Lines Matching refs:frm_cfg
300 reg_sser_rw_frm_cfg frm_cfg = {0};
337 frm_cfg.wordrate = DEFAULT_WORD_RATE;
338 frm_cfg.type = regk_sser_edge;
339 frm_cfg.frame_pin_dir = regk_sser_out;
340 frm_cfg.frame_pin_use = regk_sser_frm;
341 frm_cfg.status_pin_dir = regk_sser_in;
342 frm_cfg.status_pin_use = regk_sser_hold;
343 frm_cfg.out_on = regk_sser_tr;
344 frm_cfg.tr_delay = 1;
345 REG_WR(sser, port->regi_sser, rw_frm_cfg, frm_cfg);
657 reg_sser_rw_frm_cfg frm_cfg;
671 frm_cfg = REG_RD(sser, port->regi_sser, rw_frm_cfg);
758 frm_cfg.wordrate = GET_WORD_RATE(arg);
767 frm_cfg.out_on = regk_sser_tr;
768 frm_cfg.frame_pin_dir = regk_sser_out;
774 frm_cfg.frame_pin_dir = regk_sser_in;
780 frm_cfg.frame_pin_dir = regk_sser_out;
781 frm_cfg.out_on = regk_sser_intern_tb;
787 frm_cfg.frame_pin_dir = regk_sser_in;
793 frm_cfg.frame_pin_dir = regk_sser_out;
794 frm_cfg.out_on = regk_sser_intern_tb;
800 frm_cfg.frame_pin_dir = regk_sser_in;
812 frm_cfg.rec_delay = 1;
813 frm_cfg.tr_delay = 1;
816 frm_cfg.rec_delay = frm_cfg.tr_delay = 0;
818 frm_cfg.rec_delay = 7;
819 frm_cfg.tr_delay = 1;
822 tr_cfg.bulk_wspace = frm_cfg.tr_delay;
823 frm_cfg.early_wend = regk_sser_yes;
825 frm_cfg.type = regk_sser_edge;
827 frm_cfg.type = regk_sser_level;
829 frm_cfg.early_wend = regk_sser_no;
832 frm_cfg.frame_pin_use = regk_sser_frm;
834 frm_cfg.frame_pin_use = regk_sser_gio0;
855 frm_cfg.status_pin_use = regk_sser_frm;
858 frm_cfg.status_pin_use = regk_sser_gio0;
876 frm_cfg.level = regk_sser_pos_hi;
878 frm_cfg.level = regk_sser_neg_lo;
892 frm_cfg.level = regk_sser_pos_hi;
894 frm_cfg.level = regk_sser_neg_lo;
905 frm_cfg.frame_pin_use = regk_sser_frm;
906 frm_cfg.type = regk_sser_level;
907 frm_cfg.tr_delay = 1;
908 frm_cfg.level = regk_sser_neg_lo;
938 REG_WR(sser, port->regi_sser, rw_frm_cfg, frm_cfg);