Lines Matching refs:r0
64 | IO_FIELD (R_MMU_KBASE_HI, base_8, 8), $r0
65 move.d $r0, [R_MMU_KBASE_HI]
69 | IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
70 move.d $r0, [R_MMU_KBASE_LO]
92 | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
93 move.d $r0, [R_MMU_CONFIG]
98 | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb), $r0
99 move.d $r0, [R_MMU_KBASE_HI]
102 move.d IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
103 move.d $r0, [R_MMU_KBASE_LO]
125 | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
126 move.d $r0, [R_MMU_CONFIG]
150 move.d $pc,$r0
151 and.d 0x7fffffff,$r0 ; get rid of the non-cache bit
152 cmp.d 0x10000,$r0 ; arbitrary... just something above this code
168 move.d START_ETHERNET_CLOCK, $r0
169 move.d $r0, [R_NETWORK_GEN_CONFIG]
174 move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
175 move.d $r0, [R_WAITSTATES]
177 move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
178 move.d $r0, [R_BUS_CONFIG]
202 moveq 0, $r0 ; source
207 1: move.w [$r0+], $r3
217 moveq 0, $r0
218 move.d $r0, [romfs_length] ; default if there is no cramfs
220 move.d [$r4], $r0 ; cramfs_super.magic
221 cmp.d CRAMFS_MAGIC, $r0
224 move.d [$r4 + 4], $r0 ; cramfs_super.size
225 move.d $r0, [romfs_length]
233 moveq 1, $r0
234 move.d $r0, [romfs_in_flash]
242 moveq 0, $r0
243 move.d $r0, [romfs_length] ; default if there is no cramfs
258 move.d [$r9], $r0 ; cramfs_super.magic
259 cmp.d CRAMFS_MAGIC, $r0
262 move.d [$r9+4], $r0 ; cramfs_super.length
263 move.d $r0, [romfs_length]
271 moveq 1, $r0
272 move.d $r0, [romfs_in_flash]
283 move.d __init_end, $r0; the image will be after the end of init
284 move.d [$r0], $r1 ; cramfs assumes same endian on host/target
291 move.d [$r0 + 4], $r2 ; cramfs_super.size (again, no need to swapwb)
304 add.d $r2, $r0
311 1: move.w [$r0=$r0-2],$r3
320 moveq 0, $r0
321 move.d $r0, [romfs_in_flash]
348 move.d ibr_start,$r0 ; this symbol is set by the linker script
349 move $r0,$ibr
350 move.d $r0,[etrax_irv] ; set the interrupt base register and pointer
354 move.d __bss_start, $r0
356 1: clear.d [$r0+]
357 cmp.d $r1, $r0
363 moveq 0,$r0
364 move.d $r0,[R_ATA_CTRL_DATA]
365 move.d $r0,[R_ATA_TRANSFER_CNT]
366 move.d $r0,[R_ATA_CONFIG]
372 moveq 0,$r0
373 move.d $r0,[R_EXT_DMA_0_ADDR]
382 | IO_FIELD (R_EXT_DMA_0_CMD, trf_count, 0),$r0
383 move.d $r0,[R_EXT_DMA_0_CMD]
387 moveq IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
388 move.b $r0,[R_DMA_CH4_CMD]
389 1: move.b [R_DMA_CH4_CMD],$r0
390 and.b IO_MASK (R_DMA_CH4_CMD, cmd),$r0
391 cmp.b IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
397 moveq IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
398 move.b $r0,[R_DMA_CH5_CMD]
399 1: move.b [R_DMA_CH5_CMD],$r0
400 and.b IO_MASK (R_DMA_CH5_CMD, cmd),$r0
401 cmp.b IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
408 moveq 0,$r0
412 or.d IO_STATE (R_GEN_CONFIG, ser2, select),$r0
414 or.d IO_STATE (R_GEN_CONFIG, ser2, disable),$r0
429 | IO_STATE (R_GEN_CONFIG, par_w, disable),$r0
439 | IO_STATE (R_GEN_CONFIG, dma9, usb),$r0
443 or.d IO_STATE (R_GEN_CONFIG, g0dir, out),$r0
447 or.d IO_STATE (R_GEN_CONFIG, g8_15dir, out),$r0
450 or.d IO_STATE (R_GEN_CONFIG, g16_23dir, out),$r0
454 or.d IO_STATE (R_GEN_CONFIG, g24dir, out),$r0
457 move.d $r0,[genconfig_shadow] ; init a shadow register of R_GEN_CONFIG
460 move.d $r0,[R_GEN_CONFIG]
463 moveq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
464 move.b $r0,[R_DMA_CH8_CMD] ; reset (ser1 dma out)
465 move.b $r0,[R_DMA_CH9_CMD] ; reset (ser1 dma in)
466 1: move.b [R_DMA_CH8_CMD],$r0 ; wait for reset cycle to finish
467 andq IO_MASK (R_DMA_CH8_CMD, cmd),$r0
468 cmpq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
471 1: move.b [R_DMA_CH9_CMD],$r0 ; wait for reset cycle to finish
472 andq IO_MASK (R_DMA_CH9_CMD, cmd),$r0
473 cmpq IO_STATE (R_DMA_CH9_CMD, cmd, reset),$r0
480 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR,$r0
482 or.b IO_STATE (R_PORT_PA_DIR, dir7, output),$r0
484 move.b $r0,[port_pa_dir_shadow]
485 move.b $r0,[R_PORT_PA_DIR]
486 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA,$r0
489 and.b ~(1 << 7),$r0
491 or.b (1 << 7),$r0
494 move.b $r0,[port_pa_data_shadow]
495 move.b $r0,[R_PORT_PA_DATA]
497 move.b CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG,$r0
498 move.b $r0,[port_pb_config_shadow]
499 move.b $r0,[R_PORT_PB_CONFIG]
500 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR,$r0
502 or.b IO_STATE (R_PORT_PB_DIR, dir5, output),$r0
504 move.b $r0,[port_pb_dir_shadow]
505 move.b $r0,[R_PORT_PB_DIR]
506 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA,$r0
509 and.b ~(1 << 5),$r0
511 or.b (1 << 5),$r0
514 move.b $r0,[port_pb_data_shadow]
515 move.b $r0,[R_PORT_PB_DATA]
517 moveq 0, $r0
518 move.d $r0,[port_pb_i2c_shadow]
519 move.d $r0, [R_PORT_PB_I2C]
521 moveq 0,$r0
524 and.d ~(1 << 10),$r0
526 or.d (1 << 10),$r0
531 and.d ~(1 << 11),$r0
533 or.d (1 << 11),$r0
536 move.d $r0,[port_g_data_shadow]
537 move.d $r0,[R_PORT_G_DATA]
543 | IO_FIELD (R_SERIAL0_XOFF, xoff_char, 0),$r0
544 move.d $r0,[R_SERIAL0_XOFF]
548 | IO_STATE (R_SERIAL0_BAUD, rec_baud, c115k2Hz),$r0
549 move.b $r0,[R_SERIAL0_BAUD]
559 | IO_STATE (R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit),$r0
560 move.b $r0,[R_SERIAL0_REC_CTRL]
570 | IO_STATE (R_SERIAL0_TR_CTRL, tr_bitnr, tr_8bit),$r0
571 move.b $r0,[R_SERIAL0_TR_CTRL]
577 | IO_FIELD (R_SERIAL1_XOFF, xoff_char, 0),$r0
578 move.d $r0,[R_SERIAL1_XOFF]
582 | IO_STATE (R_SERIAL1_BAUD, rec_baud, c115k2Hz),$r0
583 move.b $r0,[R_SERIAL1_BAUD]
593 | IO_STATE (R_SERIAL1_REC_CTRL, rec_bitnr, rec_8bit),$r0
594 move.b $r0,[R_SERIAL1_REC_CTRL]
604 | IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0
605 move.b $r0,[R_SERIAL1_TR_CTRL]
612 | IO_FIELD (R_SERIAL2_XOFF, xoff_char, 0),$r0
613 move.d $r0,[R_SERIAL2_XOFF]
617 | IO_STATE (R_SERIAL2_BAUD, rec_baud, c115k2Hz),$r0
618 move.b $r0,[R_SERIAL2_BAUD]
628 | IO_STATE (R_SERIAL2_REC_CTRL, rec_bitnr, rec_8bit),$r0
629 move.b $r0,[R_SERIAL2_REC_CTRL]
639 | IO_STATE (R_SERIAL2_TR_CTRL, tr_bitnr, tr_8bit),$r0
640 move.b $r0,[R_SERIAL2_TR_CTRL]
648 | IO_FIELD (R_SERIAL3_XOFF, xoff_char, 0),$r0
649 move.d $r0,[R_SERIAL3_XOFF]
653 | IO_STATE (R_SERIAL3_BAUD, rec_baud, c115k2Hz),$r0
654 move.b $r0,[R_SERIAL3_BAUD]
664 | IO_STATE (R_SERIAL3_REC_CTRL, rec_bitnr, rec_8bit),$r0
665 move.b $r0,[R_SERIAL3_REC_CTRL]
675 | IO_STATE (R_SERIAL3_TR_CTRL, tr_bitnr, tr_8bit),$r0
676 move.b $r0,[R_SERIAL3_TR_CTRL]