Lines Matching defs:R0
23 R0 = 0x36;
24 SYSCFG = R0; /*Enable Cycle Counter and Nesting Of Interrupts(3rd Bit)*/
25 R0 = 0;
28 R1 = R0;
29 R2 = R0;
30 R3 = R0;
31 R4 = R0;
32 R5 = R0;
33 R6 = R0;
34 R7 = R0;
36 P0 = R0;
37 P1 = R0;
38 P2 = R0;
39 P3 = R0;
40 P4 = R0;
41 P5 = R0;
72 R0 = ~ENICPLB;
73 R0 = R0 & R1;
77 [p0] = R0;
84 R0 = ~ENDCPLB;
85 R0 = R0 & R1;
89 [p0] = R0;
95 R0 = RETX;
96 [P0] = R0;
171 [P0] = R0;
190 R0 = IWR_DISABLE_ALL;