Lines Matching refs:mcbsp
2 * linux/arch/arm/plat-omap/mcbsp.c
29 #include <plat/mcbsp.h>
36 void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
39 ((u16 *)mcbsp->reg_cache)[reg / sizeof(u16)] = (u16)val;
40 __raw_writew((u16)val, mcbsp->io_base + reg);
42 ((u16 *)mcbsp->reg_cache)[reg / sizeof(u32)] = (u16)val;
43 __raw_writew((u16)val, mcbsp->io_base + reg);
45 ((u32 *)mcbsp->reg_cache)[reg / sizeof(u32)] = val;
46 __raw_writel(val, mcbsp->io_base + reg);
50 int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache)
53 return !from_cache ? __raw_readw(mcbsp->io_base + reg) :
54 ((u16 *)mcbsp->reg_cache)[reg / sizeof(u16)];
56 return !from_cache ? __raw_readw(mcbsp->io_base + reg) :
57 ((u16 *)mcbsp->reg_cache)[reg / sizeof(u32)];
59 return !from_cache ? __raw_readl(mcbsp->io_base + reg) :
60 ((u32 *)mcbsp->reg_cache)[reg / sizeof(u32)];
65 void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
67 __raw_writel(val, mcbsp->st_data->io_base_st + reg);
70 int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg)
72 return __raw_readl(mcbsp->st_data->io_base_st + reg);
76 #define MCBSP_READ(mcbsp, reg) \
77 omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 0)
78 #define MCBSP_WRITE(mcbsp, reg, val) \
79 omap_mcbsp_write(mcbsp, OMAP_MCBSP_REG_##reg, val)
80 #define MCBSP_READ_CACHE(mcbsp, reg) \
81 omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 1)
86 #define MCBSP_ST_READ(mcbsp, reg) \
87 omap_mcbsp_st_read(mcbsp, OMAP_ST_REG_##reg)
88 #define MCBSP_ST_WRITE(mcbsp, reg, val) \
89 omap_mcbsp_st_write(mcbsp, OMAP_ST_REG_##reg, val)
93 struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id);
95 dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id);
96 dev_dbg(mcbsp->dev, "DRR2: 0x%04x\n",
97 MCBSP_READ(mcbsp, DRR2));
98 dev_dbg(mcbsp->dev, "DRR1: 0x%04x\n",
99 MCBSP_READ(mcbsp, DRR1));
100 dev_dbg(mcbsp->dev, "DXR2: 0x%04x\n",
101 MCBSP_READ(mcbsp, DXR2));
102 dev_dbg(mcbsp->dev, "DXR1: 0x%04x\n",
103 MCBSP_READ(mcbsp, DXR1));
104 dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n",
105 MCBSP_READ(mcbsp, SPCR2));
106 dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n",
107 MCBSP_READ(mcbsp, SPCR1));
108 dev_dbg(mcbsp->dev, "RCR2: 0x%04x\n",
109 MCBSP_READ(mcbsp, RCR2));
110 dev_dbg(mcbsp->dev, "RCR1: 0x%04x\n",
111 MCBSP_READ(mcbsp, RCR1));
112 dev_dbg(mcbsp->dev, "XCR2: 0x%04x\n",
113 MCBSP_READ(mcbsp, XCR2));
114 dev_dbg(mcbsp->dev, "XCR1: 0x%04x\n",
115 MCBSP_READ(mcbsp, XCR1));
116 dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n",
117 MCBSP_READ(mcbsp, SRGR2));
118 dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n",
119 MCBSP_READ(mcbsp, SRGR1));
120 dev_dbg(mcbsp->dev, "PCR0: 0x%04x\n",
121 MCBSP_READ(mcbsp, PCR0));
122 dev_dbg(mcbsp->dev, "***********************\n");
201 struct omap_mcbsp *mcbsp;
207 mcbsp = id_to_mcbsp_ptr(id);
209 dev_dbg(mcbsp->dev, "Configuring McBSP%d phys_base: 0x%08lx\n",
210 mcbsp->id, mcbsp->phys_base);
213 MCBSP_WRITE(mcbsp, SPCR2, config->spcr2);
214 MCBSP_WRITE(mcbsp, SPCR1, config->spcr1);
215 MCBSP_WRITE(mcbsp, RCR2, config->rcr2);
216 MCBSP_WRITE(mcbsp, RCR1, config->rcr1);
217 MCBSP_WRITE(mcbsp, XCR2, config->xcr2);
218 MCBSP_WRITE(mcbsp, XCR1, config->xcr1);
219 MCBSP_WRITE(mcbsp, SRGR2, config->srgr2);
220 MCBSP_WRITE(mcbsp, SRGR1, config->srgr1);
221 MCBSP_WRITE(mcbsp, MCR2, config->mcr2);
222 MCBSP_WRITE(mcbsp, MCR1, config->mcr1);
223 MCBSP_WRITE(mcbsp, PCR0, config->pcr0);
225 MCBSP_WRITE(mcbsp, XCCR, config->xccr);
226 MCBSP_WRITE(mcbsp, RCCR, config->rccr);
232 static void omap_st_on(struct omap_mcbsp *mcbsp)
241 w &= ~(1 << (mcbsp->id - 2));
245 w = MCBSP_READ(mcbsp, SSELCR);
246 MCBSP_WRITE(mcbsp, SSELCR, w | SIDETONEEN);
248 w = MCBSP_ST_READ(mcbsp, SYSCONFIG);
249 MCBSP_ST_WRITE(mcbsp, SYSCONFIG, w & ~(ST_AUTOIDLE));
252 w = MCBSP_ST_READ(mcbsp, SSELCR);
253 MCBSP_ST_WRITE(mcbsp, SSELCR, w | ST_SIDETONEEN);
256 static void omap_st_off(struct omap_mcbsp *mcbsp)
260 w = MCBSP_ST_READ(mcbsp, SSELCR);
261 MCBSP_ST_WRITE(mcbsp, SSELCR, w & ~(ST_SIDETONEEN));
263 w = MCBSP_ST_READ(mcbsp, SYSCONFIG);
264 MCBSP_ST_WRITE(mcbsp, SYSCONFIG, w | ST_AUTOIDLE);
266 w = MCBSP_READ(mcbsp, SSELCR);
267 MCBSP_WRITE(mcbsp, SSELCR, w & ~(SIDETONEEN));
270 w |= 1 << (mcbsp->id - 2);
274 static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir)
278 val = MCBSP_ST_READ(mcbsp, SYSCONFIG);
279 MCBSP_ST_WRITE(mcbsp, SYSCONFIG, val & ~(ST_AUTOIDLE));
281 val = MCBSP_ST_READ(mcbsp, SSELCR);
284 MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN));
286 MCBSP_ST_WRITE(mcbsp, SSELCR, val | ST_COEFFWREN);
289 MCBSP_ST_WRITE(mcbsp, SFIRCR, fir[i]);
293 val = MCBSP_ST_READ(mcbsp, SSELCR);
295 val = MCBSP_ST_READ(mcbsp, SSELCR);
297 MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN));
300 dev_err(mcbsp->dev, "McBSP FIR load error!\n");
303 static void omap_st_chgain(struct omap_mcbsp *mcbsp)
306 struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
308 w = MCBSP_ST_READ(mcbsp, SYSCONFIG);
309 MCBSP_ST_WRITE(mcbsp, SYSCONFIG, w & ~(ST_AUTOIDLE));
311 w = MCBSP_ST_READ(mcbsp, SSELCR);
313 MCBSP_ST_WRITE(mcbsp, SGAINCR, ST_CH0GAIN(st_data->ch0gain) | \
319 struct omap_mcbsp *mcbsp;
328 mcbsp = id_to_mcbsp_ptr(id);
329 st_data = mcbsp->st_data;
334 spin_lock_irq(&mcbsp->lock);
343 omap_st_chgain(mcbsp);
344 spin_unlock_irq(&mcbsp->lock);
352 struct omap_mcbsp *mcbsp;
361 mcbsp = id_to_mcbsp_ptr(id);
362 st_data = mcbsp->st_data;
367 spin_lock_irq(&mcbsp->lock);
374 spin_unlock_irq(&mcbsp->lock);
380 static int omap_st_start(struct omap_mcbsp *mcbsp)
382 struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
385 omap_st_fir_write(mcbsp, st_data->taps);
386 omap_st_chgain(mcbsp);
388 if (!mcbsp->free) {
389 omap_st_on(mcbsp);
399 struct omap_mcbsp *mcbsp;
407 mcbsp = id_to_mcbsp_ptr(id);
408 st_data = mcbsp->st_data;
413 spin_lock_irq(&mcbsp->lock);
415 omap_st_start(mcbsp);
416 spin_unlock_irq(&mcbsp->lock);
422 static int omap_st_stop(struct omap_mcbsp *mcbsp)
424 struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
427 if (!mcbsp->free) {
428 omap_st_off(mcbsp);
438 struct omap_mcbsp *mcbsp;
447 mcbsp = id_to_mcbsp_ptr(id);
448 st_data = mcbsp->st_data;
453 spin_lock_irq(&mcbsp->lock);
454 omap_st_stop(mcbsp);
456 spin_unlock_irq(&mcbsp->lock);
464 struct omap_mcbsp *mcbsp;
472 mcbsp = id_to_mcbsp_ptr(id);
473 st_data = mcbsp->st_data;
490 struct omap_mcbsp *mcbsp;
499 mcbsp = id_to_mcbsp_ptr(id);
501 if (threshold && threshold <= mcbsp->max_tx_thres)
502 MCBSP_WRITE(mcbsp, THRSH2, threshold - 1);
513 struct omap_mcbsp *mcbsp;
522 mcbsp = id_to_mcbsp_ptr(id);
524 if (threshold && threshold <= mcbsp->max_rx_thres)
525 MCBSP_WRITE(mcbsp, THRSH1, threshold - 1);
535 struct omap_mcbsp *mcbsp;
541 mcbsp = id_to_mcbsp_ptr(id);
543 return mcbsp->max_tx_thres;
553 struct omap_mcbsp *mcbsp;
559 mcbsp = id_to_mcbsp_ptr(id);
561 return mcbsp->max_rx_thres;
567 struct omap_mcbsp *mcbsp;
573 mcbsp = id_to_mcbsp_ptr(id);
575 return mcbsp->pdata->buffer_size;
584 struct omap_mcbsp *mcbsp;
591 mcbsp = id_to_mcbsp_ptr(id);
594 buffstat = MCBSP_READ(mcbsp, XBUFFSTAT);
597 return mcbsp->pdata->buffer_size - buffstat;
607 struct omap_mcbsp *mcbsp;
614 mcbsp = id_to_mcbsp_ptr(id);
617 buffstat = MCBSP_READ(mcbsp, RBUFFSTAT);
619 threshold = MCBSP_READ(mcbsp, THRSH1);
631 * operating mode for the mcbsp channel
635 struct omap_mcbsp *mcbsp;
642 mcbsp = id_to_mcbsp_ptr(id);
644 dma_op_mode = mcbsp->dma_op_mode;
650 static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
659 syscon = MCBSP_READ(mcbsp, SYSCON);
662 if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) {
665 MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
670 MCBSP_WRITE(mcbsp, SYSCON, syscon);
674 static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp)
682 syscon = MCBSP_READ(mcbsp, SYSCON);
685 MCBSP_WRITE(mcbsp, SYSCON, syscon);
688 MCBSP_WRITE(mcbsp, SYSCON, syscon);
690 MCBSP_WRITE(mcbsp, WAKEUPEN, 0);
694 static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp) {}
695 static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp) {}
696 static inline void omap_st_start(struct omap_mcbsp *mcbsp) {}
697 static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {}
706 struct omap_mcbsp *mcbsp;
712 mcbsp = id_to_mcbsp_ptr(id);
714 spin_lock(&mcbsp->lock);
716 if (!mcbsp->free) {
717 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
718 mcbsp->id);
719 spin_unlock(&mcbsp->lock);
723 mcbsp->io_type = io_type;
725 spin_unlock(&mcbsp->lock);
733 struct omap_mcbsp *mcbsp;
741 mcbsp = id_to_mcbsp_ptr(id);
748 spin_lock(&mcbsp->lock);
749 if (!mcbsp->free) {
750 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
751 mcbsp->id);
756 mcbsp->free = 0;
757 mcbsp->reg_cache = reg_cache;
758 spin_unlock(&mcbsp->lock);
760 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
761 mcbsp->pdata->ops->request(id);
763 clk_enable(mcbsp->iclk);
764 clk_enable(mcbsp->fclk);
767 omap34xx_mcbsp_request(mcbsp);
773 MCBSP_WRITE(mcbsp, SPCR1, 0);
774 MCBSP_WRITE(mcbsp, SPCR2, 0);
776 if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
778 init_completion(&mcbsp->tx_irq_completion);
779 err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
780 0, "McBSP", (void *)mcbsp);
782 dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
783 "for McBSP%d\n", mcbsp->tx_irq,
784 mcbsp->id);
788 if (mcbsp->rx_irq) {
789 init_completion(&mcbsp->rx_irq_completion);
790 err = request_irq(mcbsp->rx_irq,
792 0, "McBSP", (void *)mcbsp);
794 dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
795 "for McBSP%d\n", mcbsp->rx_irq,
796 mcbsp->id);
804 free_irq(mcbsp->tx_irq, (void *)mcbsp);
806 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
807 mcbsp->pdata->ops->free(id);
810 omap34xx_mcbsp_free(mcbsp);
812 clk_disable(mcbsp->fclk);
813 clk_disable(mcbsp->iclk);
815 spin_lock(&mcbsp->lock);
816 mcbsp->free = 1;
817 mcbsp->reg_cache = NULL;
819 spin_unlock(&mcbsp->lock);
828 struct omap_mcbsp *mcbsp;
835 mcbsp = id_to_mcbsp_ptr(id);
837 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
838 mcbsp->pdata->ops->free(id);
841 omap34xx_mcbsp_free(mcbsp);
843 clk_disable(mcbsp->fclk);
844 clk_disable(mcbsp->iclk);
846 if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
848 if (mcbsp->rx_irq)
849 free_irq(mcbsp->rx_irq, (void *)mcbsp);
850 free_irq(mcbsp->tx_irq, (void *)mcbsp);
853 reg_cache = mcbsp->reg_cache;
855 spin_lock(&mcbsp->lock);
856 if (mcbsp->free)
857 dev_err(mcbsp->dev, "McBSP%d was not reserved\n", mcbsp->id);
859 mcbsp->free = 1;
860 mcbsp->reg_cache = NULL;
861 spin_unlock(&mcbsp->lock);
875 struct omap_mcbsp *mcbsp;
883 mcbsp = id_to_mcbsp_ptr(id);
886 omap_st_start(mcbsp);
888 mcbsp->rx_word_length = (MCBSP_READ_CACHE(mcbsp, RCR1) >> 5) & 0x7;
889 mcbsp->tx_word_length = (MCBSP_READ_CACHE(mcbsp, XCR1) >> 5) & 0x7;
891 idle = !((MCBSP_READ_CACHE(mcbsp, SPCR2) |
892 MCBSP_READ_CACHE(mcbsp, SPCR1)) & 1);
896 w = MCBSP_READ_CACHE(mcbsp, SPCR2);
897 MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 6));
902 w = MCBSP_READ_CACHE(mcbsp, SPCR2);
903 MCBSP_WRITE(mcbsp, SPCR2, w | tx);
906 w = MCBSP_READ_CACHE(mcbsp, SPCR1);
907 MCBSP_WRITE(mcbsp, SPCR1, w | rx);
919 w = MCBSP_READ_CACHE(mcbsp, SPCR2);
920 MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 7));
925 w = MCBSP_READ_CACHE(mcbsp, XCCR);
927 MCBSP_WRITE(mcbsp, XCCR, w);
928 w = MCBSP_READ_CACHE(mcbsp, RCCR);
930 MCBSP_WRITE(mcbsp, RCCR, w);
940 struct omap_mcbsp *mcbsp;
949 mcbsp = id_to_mcbsp_ptr(id);
954 w = MCBSP_READ_CACHE(mcbsp, XCCR);
956 MCBSP_WRITE(mcbsp, XCCR, w);
958 w = MCBSP_READ_CACHE(mcbsp, SPCR2);
959 MCBSP_WRITE(mcbsp, SPCR2, w & ~tx);
964 w = MCBSP_READ_CACHE(mcbsp, RCCR);
966 MCBSP_WRITE(mcbsp, RCCR, w);
968 w = MCBSP_READ_CACHE(mcbsp, SPCR1);
969 MCBSP_WRITE(mcbsp, SPCR1, w & ~rx);
971 idle = !((MCBSP_READ_CACHE(mcbsp, SPCR2) |
972 MCBSP_READ_CACHE(mcbsp, SPCR1)) & 1);
976 w = MCBSP_READ_CACHE(mcbsp, SPCR2);
977 MCBSP_WRITE(mcbsp, SPCR2, w & ~(1 << 6));
981 omap_st_stop(mcbsp);
985 /* polled mcbsp i/o operations */
988 struct omap_mcbsp *mcbsp;
995 mcbsp = id_to_mcbsp_ptr(id);
997 MCBSP_WRITE(mcbsp, DXR1, buf);
999 if (MCBSP_READ(mcbsp, SPCR2) & XSYNC_ERR) {
1001 MCBSP_WRITE(mcbsp, SPCR2, MCBSP_READ_CACHE(mcbsp, SPCR2));
1007 while (!(MCBSP_READ(mcbsp, SPCR2) & XRDY)) {
1009 MCBSP_WRITE(mcbsp, SPCR2,
1010 MCBSP_READ_CACHE(mcbsp, SPCR2) &
1013 MCBSP_WRITE(mcbsp, SPCR2,
1014 MCBSP_READ_CACHE(mcbsp, SPCR2) |
1017 dev_err(mcbsp->dev, "Could not write to"
1018 " McBSP%d Register\n", mcbsp->id);
1030 struct omap_mcbsp *mcbsp;
1036 mcbsp = id_to_mcbsp_ptr(id);
1039 if (MCBSP_READ(mcbsp, SPCR1) & RSYNC_ERR) {
1041 MCBSP_WRITE(mcbsp, SPCR1, MCBSP_READ_CACHE(mcbsp, SPCR1));
1047 while (!(MCBSP_READ(mcbsp, SPCR1) & RRDY)) {
1049 MCBSP_WRITE(mcbsp, SPCR1,
1050 MCBSP_READ_CACHE(mcbsp, SPCR1) &
1053 MCBSP_WRITE(mcbsp, SPCR1,
1054 MCBSP_READ_CACHE(mcbsp, SPCR1) |
1057 dev_err(mcbsp->dev, "Could not read from"
1058 " McBSP%d Register\n", mcbsp->id);
1063 *buf = MCBSP_READ(mcbsp, DRR1);
1074 struct omap_mcbsp *mcbsp;
1082 mcbsp = id_to_mcbsp_ptr(id);
1083 word_length = mcbsp->tx_word_length;
1085 wait_for_completion(&mcbsp->tx_irq_completion);
1088 MCBSP_WRITE(mcbsp, DXR2, word >> 16);
1089 MCBSP_WRITE(mcbsp, DXR1, word & 0xffff);
1095 struct omap_mcbsp *mcbsp;
1103 mcbsp = id_to_mcbsp_ptr(id);
1105 word_length = mcbsp->rx_word_length;
1107 wait_for_completion(&mcbsp->rx_irq_completion);
1110 word_msb = MCBSP_READ(mcbsp, DRR2);
1111 word_lsb = MCBSP_READ(mcbsp, DRR1);
1119 struct omap_mcbsp *mcbsp;
1128 mcbsp = id_to_mcbsp_ptr(id);
1129 tx_word_length = mcbsp->tx_word_length;
1130 rx_word_length = mcbsp->rx_word_length;
1136 spcr2 = MCBSP_READ(mcbsp, SPCR2);
1138 spcr2 = MCBSP_READ(mcbsp, SPCR2);
1141 MCBSP_WRITE(mcbsp, SPCR2,
1142 MCBSP_READ_CACHE(mcbsp, SPCR2) & (~XRST));
1144 MCBSP_WRITE(mcbsp, SPCR2,
1145 MCBSP_READ_CACHE(mcbsp, SPCR2) | XRST);
1147 dev_err(mcbsp->dev, "McBSP%d transmitter not "
1148 "ready\n", mcbsp->id);
1155 MCBSP_WRITE(mcbsp, DXR2, word >> 16);
1156 MCBSP_WRITE(mcbsp, DXR1, word & 0xffff);
1159 spcr1 = MCBSP_READ(mcbsp, SPCR1);
1161 spcr1 = MCBSP_READ(mcbsp, SPCR1);
1164 MCBSP_WRITE(mcbsp, SPCR1,
1165 MCBSP_READ_CACHE(mcbsp, SPCR1) & (~RRST));
1167 MCBSP_WRITE(mcbsp, SPCR1,
1168 MCBSP_READ_CACHE(mcbsp, SPCR1) | RRST);
1170 dev_err(mcbsp->dev, "McBSP%d receiver not "
1171 "ready\n", mcbsp->id);
1178 word_msb = MCBSP_READ(mcbsp, DRR2);
1179 word_lsb = MCBSP_READ(mcbsp, DRR1);
1187 struct omap_mcbsp *mcbsp;
1198 mcbsp = id_to_mcbsp_ptr(id);
1200 tx_word_length = mcbsp->tx_word_length;
1201 rx_word_length = mcbsp->rx_word_length;
1207 spcr2 = MCBSP_READ(mcbsp, SPCR2);
1209 spcr2 = MCBSP_READ(mcbsp, SPCR2);
1212 MCBSP_WRITE(mcbsp, SPCR2,
1213 MCBSP_READ_CACHE(mcbsp, SPCR2) & (~XRST));
1215 MCBSP_WRITE(mcbsp, SPCR2,
1216 MCBSP_READ_CACHE(mcbsp, SPCR2) | XRST);
1218 dev_err(mcbsp->dev, "McBSP%d transmitter not "
1219 "ready\n", mcbsp->id);
1226 MCBSP_WRITE(mcbsp, DXR2, clock_word >> 16);
1227 MCBSP_WRITE(mcbsp, DXR1, clock_word & 0xffff);
1230 spcr1 = MCBSP_READ(mcbsp, SPCR1);
1232 spcr1 = MCBSP_READ(mcbsp, SPCR1);
1235 MCBSP_WRITE(mcbsp, SPCR1,
1236 MCBSP_READ_CACHE(mcbsp, SPCR1) & (~RRST));
1238 MCBSP_WRITE(mcbsp, SPCR1,
1239 MCBSP_READ_CACHE(mcbsp, SPCR1) | RRST);
1241 dev_err(mcbsp->dev, "McBSP%d receiver not "
1242 "ready\n", mcbsp->id);
1249 word_msb = MCBSP_READ(mcbsp, DRR2);
1250 word_lsb = MCBSP_READ(mcbsp, DRR1);
1268 struct omap_mcbsp *mcbsp;
1278 mcbsp = id_to_mcbsp_ptr(id);
1280 if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX",
1282 mcbsp,
1284 dev_err(mcbsp->dev, " Unable to request DMA channel for "
1286 mcbsp->id);
1289 mcbsp->dma_tx_lch = dma_tx_ch;
1291 dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id,
1294 init_completion(&mcbsp->tx_dma_completion);
1301 sync_dev = mcbsp->dma_tx_sync;
1303 omap_set_dma_transfer_params(mcbsp->dma_tx_lch,
1309 omap_set_dma_dest_params(mcbsp->dma_tx_lch,
1312 mcbsp->phys_base + OMAP_MCBSP_REG_DXR1,
1315 omap_set_dma_src_params(mcbsp->dma_tx_lch,
1321 omap_start_dma(mcbsp->dma_tx_lch);
1322 wait_for_completion(&mcbsp->tx_dma_completion);
1331 struct omap_mcbsp *mcbsp;
1341 mcbsp = id_to_mcbsp_ptr(id);
1343 if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX",
1345 mcbsp,
1347 dev_err(mcbsp->dev, "Unable to request DMA channel for "
1349 mcbsp->id);
1352 mcbsp->dma_rx_lch = dma_rx_ch;
1354 dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id,
1357 init_completion(&mcbsp->rx_dma_completion);
1364 sync_dev = mcbsp->dma_rx_sync;
1366 omap_set_dma_transfer_params(mcbsp->dma_rx_lch,
1372 omap_set_dma_src_params(mcbsp->dma_rx_lch,
1375 mcbsp->phys_base + OMAP_MCBSP_REG_DRR1,
1378 omap_set_dma_dest_params(mcbsp->dma_rx_lch,
1384 omap_start_dma(mcbsp->dma_rx_lch);
1385 wait_for_completion(&mcbsp->rx_dma_completion);
1400 struct omap_mcbsp *mcbsp;
1407 mcbsp = id_to_mcbsp_ptr(id);
1465 #define max_thres(m) (mcbsp->pdata->buffer_size)
1471 struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); \
1473 return sprintf(buf, "%u\n", mcbsp->prop); \
1480 struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); \
1488 if (!valid_threshold(mcbsp, val)) \
1491 mcbsp->prop = val; \
1507 struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
1512 dma_op_mode = mcbsp->dma_op_mode;
1529 struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
1540 spin_lock_irq(&mcbsp->lock);
1541 if (!mcbsp->free) {
1545 mcbsp->dma_op_mode = i;
1548 spin_unlock_irq(&mcbsp->lock);
1558 struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
1559 struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
1563 spin_lock_irq(&mcbsp->lock);
1569 spin_unlock_irq(&mcbsp->lock);
1578 struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
1579 struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
1582 spin_lock_irq(&mcbsp->lock);
1606 spin_unlock_irq(&mcbsp->lock);
1643 int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
1645 struct omap_mcbsp_platform_data *pdata = mcbsp->pdata;
1649 st_data = kzalloc(sizeof(*mcbsp->st_data), GFP_KERNEL);
1661 err = sysfs_create_group(&mcbsp->dev->kobj, &sidetone_attr_group);
1665 mcbsp->st_data = st_data;
1677 static void __devexit omap_st_remove(struct omap_mcbsp *mcbsp)
1679 struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
1682 sysfs_remove_group(&mcbsp->dev->kobj, &sidetone_attr_group);
1688 static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp)
1690 mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT;
1700 mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10;
1701 mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10;
1706 if (omap_additional_add(mcbsp->dev))
1707 dev_warn(mcbsp->dev,
1710 if (mcbsp->id == 2 || mcbsp->id == 3)
1711 if (omap_st_add(mcbsp))
1712 dev_warn(mcbsp->dev,
1716 mcbsp->max_tx_thres = -EINVAL;
1717 mcbsp->max_rx_thres = -EINVAL;
1721 static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp)
1724 omap_additional_remove(mcbsp->dev);
1726 if (mcbsp->id == 2 || mcbsp->id == 3)
1727 omap_st_remove(mcbsp);
1731 static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp) {}
1732 static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp) {}
1742 struct omap_mcbsp *mcbsp;
1761 mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL);
1762 if (!mcbsp) {
1767 spin_lock_init(&mcbsp->lock);
1768 mcbsp->id = id + 1;
1769 mcbsp->free = 1;
1770 mcbsp->dma_tx_lch = -1;
1771 mcbsp->dma_rx_lch = -1;
1773 mcbsp->phys_base = pdata->phys_base;
1774 mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K);
1775 if (!mcbsp->io_base) {
1781 mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
1782 mcbsp->tx_irq = pdata->tx_irq;
1783 mcbsp->rx_irq = pdata->rx_irq;
1784 mcbsp->dma_rx_sync = pdata->dma_rx_sync;
1785 mcbsp->dma_tx_sync = pdata->dma_tx_sync;
1787 mcbsp->iclk = clk_get(&pdev->dev, "ick");
1788 if (IS_ERR(mcbsp->iclk)) {
1789 ret = PTR_ERR(mcbsp->iclk);
1794 mcbsp->fclk = clk_get(&pdev->dev, "fck");
1795 if (IS_ERR(mcbsp->fclk)) {
1796 ret = PTR_ERR(mcbsp->fclk);
1801 mcbsp->pdata = pdata;
1802 mcbsp->dev = &pdev->dev;
1803 mcbsp_ptr[id] = mcbsp;
1804 platform_set_drvdata(pdev, mcbsp);
1806 /* Initialize mcbsp properties for OMAP34XX if needed / applicable */
1807 omap34xx_device_init(mcbsp);
1812 clk_put(mcbsp->iclk);
1814 iounmap(mcbsp->io_base);
1816 kfree(mcbsp);
1823 struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
1826 if (mcbsp) {
1828 if (mcbsp->pdata && mcbsp->pdata->ops &&
1829 mcbsp->pdata->ops->free)
1830 mcbsp->pdata->ops->free(mcbsp->id);
1832 omap34xx_device_exit(mcbsp);
1834 clk_disable(mcbsp->fclk);
1835 clk_disable(mcbsp->iclk);
1836 clk_put(mcbsp->fclk);
1837 clk_put(mcbsp->iclk);
1839 iounmap(mcbsp->io_base);
1841 mcbsp->fclk = NULL;
1842 mcbsp->iclk = NULL;
1843 mcbsp->free = 0;
1844 mcbsp->dev = NULL;
1854 .name = "omap-mcbsp",