Lines Matching defs:dma_read
157 #define dma_read(reg) \
251 ccr = dma_read(CCR(lch));
267 l = dma_read(CSDP(lch));
275 ccr = dma_read(CCR(lch));
281 ccr = dma_read(CCR2(lch));
291 val = dma_read(CCR(lch));
331 w = dma_read(CCR2(lch));
348 w = dma_read(LCH_CTRL(lch));
362 val = dma_read(CCR(lch));
390 csdp = dma_read(CSDP(lch));
403 l = dma_read(LCH_CTRL(lch));
421 w = dma_read(CSDP(lch));
427 l = dma_read(CCR(lch));
478 l = dma_read(CSDP(lch));
491 l = dma_read(CSDP(lch));
539 l = dma_read(CSDP(lch));
545 l = dma_read(CCR(lch));
577 l = dma_read(CSDP(lch));
590 l = dma_read(CSDP(lch));
633 status = dma_read(CSR(lch));
663 l = dma_read(CLNK_CTRL(lch));
685 l = dma_read(CLNK_CTRL(lch));
713 val = dma_read(IRQENABLE_L0);
728 val = dma_read(IRQENABLE_L0);
906 l = dma_read(CCR(lch));
932 l = dma_read(CCR(lch));
937 l = dma_read(CSR(lch));
997 l = dma_read(CCR(lch));
1018 l = dma_read(CCR(lch));
1025 l = dma_read(OCP_SYSCONFIG);
1031 l = dma_read(CCR(lch));
1036 l = dma_read(CCR(lch));
1041 l = dma_read(CCR(lch));
1116 offset = dma_read(CPC(lch));
1118 offset = dma_read(CSAC(lch));
1125 offset = dma_read(CSAC(lch));
1128 offset |= (dma_read(CSSA_U(lch)) << 16);
1147 offset = dma_read(CPC(lch));
1149 offset = dma_read(CDAC(lch));
1156 offset = dma_read(CDAC(lch));
1159 offset |= (dma_read(CDSA_U(lch)) << 16);
1167 return (dma_read(CCR(lch)) & OMAP_DMA_CCR_EN) != 0;
1180 if (dma_read(CCR(lch)) & OMAP_DMA_CCR_EN)
1195 dma_write(dma_read(CCR(lch_head)) | (3 << 8),
1222 dma_write(dma_read(CCR(lch_head)) & ~(3 << 8),
1275 l = dma_read(CLNK_CTRL(lch_head));
1280 l = dma_read(CLNK_CTRL(lch_queue));
1598 if (0 == ((1 << 7) & dma_read(
1615 l = dma_read(CCR(lch));
1676 l = dma_read(CCR(channels[0]));
1724 sys_cf = dma_read(OCP_SYSCONFIG);
1733 l = dma_read(CCR(channels[i]));
1790 *ei = dma_read(CCEN(lch));
1791 *fi = dma_read(CCFN(lch));
1828 return dma_read(CDAC(lch));
1862 return dma_read(CSAC(lch));
1879 csr = dma_read(CSR(ch));
1932 u32 status = dma_read(CSR(ch));
1962 ccr = dma_read(CCR(ch));
1982 if (dma_read(CLNK_CTRL(ch)) & (1 << 15))
1992 status = dma_read(CSR(ch));
2009 val = dma_read(IRQSTATUS_L0);
2015 enable_reg = dma_read(IRQENABLE_L0);
2041 dma_read(IRQENABLE_L0);
2043 dma_read(OCP_SYSCONFIG);
2044 omap_dma_global_context.dma_gcr = dma_read(GCR);
2124 dma_read(HW_ID));
2126 (dma_read(CAPS_0_U) << 16) |
2127 dma_read(CAPS_0_L),
2128 (dma_read(CAPS_1_U) << 16) |
2129 dma_read(CAPS_1_L),
2130 dma_read(CAPS_2), dma_read(CAPS_3),
2131 dma_read(CAPS_4));
2136 w = dma_read(GSCR);
2143 u8 revision = dma_read(REVISION) & 0xff;
2202 u32 v = dma_read(OCP_SYSCONFIG);