Lines Matching refs:soc_pci_write_config
106 static int soc_pci_write_config(struct pci_bus *bus, unsigned int devfn,
280 .write = soc_pci_write_config,
413 soc_pci_write_config(bus, devfn, 0x1dc, 4, dRead);
423 soc_pci_write_config(bus, devfn, 0x62c, 4, dRead);
427 soc_pci_write_config(bus, devfn, 0x62c, 4, dRead);
434 soc_pci_write_config(bus, devfn, 0x4, 2, bm);
445 soc_pci_write_config(bus, devfn, 0x18, 4, PLX_PRIM_SEC_BUS_NUM);
452 soc_pci_write_config(bus, devfn, PCI_MEMORY_BASE, 2,
455 soc_pci_write_config(bus, devfn, PCI_MEMORY_LIMIT, 2,
460 soc_pci_write_config(bus, devfn, 0x18, 4,
464 soc_pci_write_config(bus, devfn, PCI_MEMORY_BASE, 2,
467 soc_pci_write_config(bus, devfn, PCI_MEMORY_LIMIT, 2,
474 soc_pci_write_config(bus, devfn, 0x18, 4,
478 soc_pci_write_config(bus, devfn, PCI_MEMORY_BASE, 2,
481 soc_pci_write_config(bus, devfn, PCI_MEMORY_LIMIT, 2,
507 soc_pci_write_config(bus, devfn, 0x4, 2, bm);
520 soc_pci_write_config(bus, devfn, 0x18, 4, (0x00000201 | (PCI_MAX_BUS << 16)));
524 soc_pci_write_config(bus, devfn, PCI_MEMORY_BASE, 2,
527 soc_pci_write_config(bus, devfn, PCI_MEMORY_LIMIT, 2,
534 soc_pci_write_config(bus, devfn, 0x18, 4,
538 soc_pci_write_config(bus, devfn, PCI_MEMORY_BASE, 2,
541 soc_pci_write_config(bus, devfn, PCI_MEMORY_LIMIT, 2,
550 soc_pci_write_config(bus, devfn, 0x18, 4,
554 soc_pci_write_config(bus, devfn, PCI_MEMORY_BASE, 2,
557 soc_pci_write_config(bus, devfn, PCI_MEMORY_LIMIT, 2,
660 static int soc_pci_write_config(struct pci_bus *bus, unsigned int devfn,