Lines Matching refs:_reg_write
582 static void inline _reg_write( struct nandc_ctrl *ctrl,
736 _reg_write( ctrl, NANDC_INT_N_REG(irq_off), 1 );
753 _reg_write( ctrl, NANDC_INT_N_REG(irq_off), 1 );
887 _reg_write( ctrl, NANDC_CMD_EXT_ADDR, nand_addr >> 32 );
892 _reg_write( ctrl, NANDC_ACC_CTRL_RD_ECC(n), 0 );
901 _reg_write( ctrl, NANDC_CMD_ADDRESS, nand_addr + col);
903 _reg_write(ctrl, NANDC_CMD_START_OPCODE,
948 _reg_write( ctrl, NANDC_ACC_CTRL_WR_ECC(n), 0 );
954 _reg_write( ctrl, NANDC_CMD_EXT_ADDR, nand_addr >> 32 );
957 _reg_write( ctrl, NANDC_ACC_CTRL_PGM_PARTIAL(n), 1 );
967 _reg_write( ctrl, NANDC_CMD_ADDRESS, nand_addr + col);
980 _reg_write(ctrl, NANDC_CMD_START_OPCODE,
993 _reg_write( ctrl, NANDC_ACC_CTRL_PGM_PARTIAL(n), 0 );
1046 _reg_write( ctrl, NANDC_CMD_EXT_ADDR, nand_addr >> 32 );
1049 _reg_write( ctrl, NANDC_ACC_CTRL_RD_ECC(n), ecc );
1062 _reg_write( ctrl, NANDC_CMD_ADDRESS, nand_addr + col);
1065 _reg_write(ctrl, NANDC_CMD_START_OPCODE,
1183 _reg_write( ctrl, NANDC_ACC_CTRL_WR_ECC(n), ecc );
1201 _reg_write( ctrl, NANDC_CMD_ADDRESS, nand_addr + col );
1222 _reg_write(ctrl, NANDC_CMD_START_OPCODE,
1317 _reg_write( ctrl, NANDC_CMD_CS_SEL, chip);
1352 _reg_write( ctrl, NANDC_CMD_EXT_ADDR, nand_addr >> 32 );
1353 _reg_write( ctrl, NANDC_CMD_ADDRESS, nand_addr );
1372 _reg_write(ctrl, NANDC_CMD_START_OPCODE,
1378 _reg_write(ctrl, NANDC_CMD_START_OPCODE,
1386 _reg_write(ctrl, NANDC_CMD_START_OPCODE,
1391 _reg_write(ctrl, NANDC_CMD_START_OPCODE,
1399 _reg_write(ctrl, NANDC_CMD_START_OPCODE,
1445 _reg_write( ctrl, NANDC_ACC_CTRL_SECTOR_1K(0), 1);
1446 _reg_write( ctrl, NANDC_ACC_CTRL_ECC_LEVEL(0), 4);
1488 _reg_write( ctrl, NANDC_ACC_CTRL_SECTOR_1K(chip_num),
1490 _reg_write( ctrl, NANDC_ACC_CTRL_ECC_LEVEL(chip_num),
1495 _reg_write( ctrl,
1497 _reg_write( ctrl,
1503 _reg_write( ctrl, NANDC_ACC_CTRL_ERA_ECC_ERR(chip_num), 0 );
1505 _reg_write( ctrl, NANDC_ACC_CTRL_PG_HIT(chip_num), 0 );
1506 _reg_write( ctrl, NANDC_ACC_CTRL_PREFETCH(chip_num), 0 );
1507 _reg_write( ctrl, NANDC_ACC_CTRL_CACHE_MODE(chip_num), 0 );
1508 _reg_write( ctrl, NANDC_ACC_CTRL_CACHE_LASTPG(chip_num), 0 );
1515 _reg_write( ctrl, NANDC_CS_NAND_WP, 0);
1604 _reg_write( ctrl, NANDC_CS_AUTO_CONFIG, 1);