Lines Matching refs:_reg_read
333 static unsigned inline _reg_read( struct net_device *dev, reg_bit_field_t rbf )
522 _reg_read(dev, GMAC_TXSTAT_CURR_DESC(q)),
523 _reg_read(dev, GMAC_TXSTAT_ACT_DESC(q)),
524 _reg_read(dev, GMAC_TX_PTR(q)),
525 _reg_read(dev, GMAC_TXSTAT_TXSTATE(0)),
526 _reg_read(dev, GMAC_TXSTAT_TXERR(0))
631 int_msk = _reg_read( dev, GMAC_INTMASK );
695 curr_rx_ix = _reg_read( dev, GMAC_RXSTAT_CURR_DESC );
908 reg = _reg_read( dev, GMAC_INTSTAT);
913 if( _reg_read( dev, GMAC_INTSTAT_RX_INT) )
915 if( _reg_read( dev, GMAC_INTSTAT_TX_INT(q)))
917 if( _reg_read( dev, GMAC_INTSTAT_TIMER_INT))
927 if( _reg_read( dev, GMAC_INTSTAT_RX_INT) ) {
934 if( _reg_read( dev, GMAC_INTSTAT_TX_INT(q)) ||
935 _reg_read( dev, GMAC_INTSTAT_TIMER_INT)) {
947 if( _reg_read( dev, GMAC_INTSTAT_MII_LINK_CHANGE)) {
951 if( _reg_read( dev, GMAC_INTSTAT_SW_LINK_CHANGE)) {
956 if( _reg_read( dev, GMAC_INTSTAT_DMA_DESC_ERR)) {
961 if( _reg_read( dev, GMAC_INTSTAT_DMA_DATA_ERR)) {
966 if( _reg_read( dev, GMAC_INTSTAT_DMA_PROTO_ERR)) {
971 if( _reg_read( dev, GMAC_INTSTAT_DMA_RX_UNDERFLOW)) {
977 if( _reg_read( dev, GMAC_INTSTAT_DMA_RX_OVERFLOW)) {
983 if( _reg_read( dev, GMAC_INTSTAT_DMA_TX_UNDERFLOW)) {
1012 curr_tx_ix = _reg_read( dev, GMAC_TXSTAT_CURR_DESC(q) );
1133 off =_reg_read( dev, GMAC_TX_PTR(q) );
1279 _reg_read(dev, UMAC_CONFIG), _reg_read(dev, UMAC_MAC_STAT));
1497 hw_addr[0] = _reg_read( dev, UMAC_MACADDR_LOW );
1498 hw_addr[1] = _reg_read( dev, UMAC_MACADDR_HIGH );