Lines Matching refs:mcr
94 1: mcr p15, 0, \rd, c7, c2, 5 @ allocate D cache line
96 mcr p15, 0, \rd, c7, c2, 5 @ allocate D cache line
98 mcr p15, 0, \rd, c7, c2, 5 @ allocate D cache line
100 mcr p15, 0, \rd, c7, c2, 5 @ allocate D cache line
120 mcr p15, 0, r1, c1, c0, 1
130 mcr p15, 0, r0, c1, c0, 0 @ disable caches
148 mcr p15, 0, r1, c10, c4, 1 @ unlock I-TLB
149 mcr p15, 0, r1, c8, c5, 0 @ invalidate I-TLB
155 mcr p15, 0, r1, c1, c0, 0 @ ctrl register
157 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches & BTB
158 mcr p15, 0, r1, c1, c0, 0 @ ctrl register
161 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
178 mcr p14, 0, r0, c7, c0, 0 @ Go to IDLE
226 mcr p15, 0, r0, c7, c10, 1 @ Clean D cache line
227 mcr p15, 0, r0, c7, c6, 1 @ Invalidate D cache line
251 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
256 mcr p15, 0, r0, c7, c5, 0 @ Invalidate I cache & BTB
257 mcr p15, 0, r0, c7, c10, 4 @ Drain Write (& Fill) Buffer
272 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
273 mcr p15, 0, r0, c7, c5, 1 @ Invalidate I cache entry
278 mcr p15, 0, r0, c7, c5, 6 @ Invalidate BTB
279 mcr p15, 0, r0, c7, c10, 4 @ Drain Write (& Fill) Buffer
293 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
294 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
299 mcr p15, 0, r0, c7, c5, 0 @ Invalidate I cache & BTB
300 mcr p15, 0, r0, c7, c10, 4 @ Drain Write (& Fill) Buffer
320 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
324 mcr p15, 0, r0, c7, c10, 4 @ Drain Write (& Fill) Buffer
337 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
341 mcr p15, 0, r0, c7, c10, 4 @ Drain Write (& Fill) Buffer
354 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
355 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
359 mcr p15, 0, r0, c7, c10, 4 @ Drain Write (& Fill) Buffer
422 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
440 mcr p15, 0, ip, c7, c5, 0 @ Invalidate I cache & BTB
441 mcr p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer
442 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
443 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
500 mcr p15, 0, ip, c7, c7, 0 @ invalidate I, D caches & BTB
501 mcr p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer
502 mcr p15, 0, ip, c8, c7, 0 @ invalidate I, D TLBs
505 mcr p15, 0, r0, c15, c1, 0 @ affects USR or SVC modes