Lines Matching refs:c7
72 1: mcr p15, 0, \rd, c7, c14, 2 @ clean/invalidate L1 D line
116 mcr p15, 0, ip, c7, c7, 0 @ invalidate L1 caches and BTB
121 mcr p15, 0, ip, c8, c7, 0 @ invalidate I and D TLBs
138 mcr p14, 0, r0, c7, c0, 0 @ go to idle
163 mcrne p15, 0, ip, c7, c5, 0 @ invalidate L1 I cache and BTB
164 mcrne p15, 0, ip, c7, c10, 4 @ data write barrier
165 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
186 mcrne p15, 0, r0, c7, c5, 1 @ invalidate L1 I line
187 mcr p15, 0, r0, c7, c14, 1 @ clean/invalidate L1 D line
192 mcrne p15, 0, ip, c7, c5, 6 @ invalidate BTB
193 mcrne p15, 0, ip, c7, c10, 4 @ data write barrier
194 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
214 1: mcr p15, 0, r0, c7, c10, 1 @ clean L1 D line
219 mcr p15, 0, r0, c7, c5, 0 @ invalidate L1 I cache and BTB
220 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
221 mcr p15, 0, r0, c7, c5, 4 @ prefetch flush
235 1: mcr p15, 0, r0, c7, c14, 1 @ clean/invalidate L1 D line
240 mcr p15, 0, r0, c7, c5, 0 @ invalidate L1 I cache and BTB
241 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
242 mcr p15, 0, r0, c7, c5, 4 @ prefetch flush
259 mcrne p15, 0, r0, c7, c10, 1 @ clean L1 D line
261 mcrne p15, 0, r1, c7, c10, 1 @ clean L1 D line
262 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate L1 D line
266 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
279 1: mcr p15, 0, r0, c7, c10, 1 @ clean L1 D line
283 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
296 1: mcr p15, 0, r0, c7, c14, 1 @ clean/invalidate L1 D line
300 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
339 1: mcr p15, 0, r0, c7, c10, 1 @ clean L1 D line
357 mcr p15, 0, ip, c7, c5, 0 @ invalidate L1 I cache and BTB
358 mcr p15, 0, ip, c7, c10, 4 @ data write barrier
359 mcr p15, 0, ip, c7, c5, 4 @ prefetch flush
362 mcr p15, 0, ip, c8, c7, 0 @ invalidate I and D TLBs
413 mcr p15, 0, ip, c7, c7, 0 @ invalidate L1 caches and BTB
414 mcr p15, 0, ip, c7, c10, 4 @ data write barrier
415 mcr p15, 0, ip, c7, c5, 4 @ prefetch flush
416 mcr p15, 0, ip, c8, c7, 0 @ invalidate I and D TLBs