Lines Matching refs:mcr
53 mcr p15, 0, r0, c1, c0, 0 @ disable caches
87 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
112 mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
114 mcr p15, 0, r2, c13, c0, 1 @ set reserved context ID
116 1: mcr p15, 0, r0, c2, c0, 0 @ set TTB 0
118 mcr p15, 0, r1, c13, c0, 1 @ set context ID
165 mcr p15, 0, r0, c7, c10, 1 @ flush_pte
213 mcr p15, 0, r0, c1, c0, 1 @ TLB ops broadcasting
299 mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate
303 mcr p15, 0, r10, c8, c7, 0 @ invalidate I + D TLBs
304 mcr p15, 0, r10, c2, c0, 2 @ TTB control register
306 mcr p15, 0, r4, c2, c0, 1 @ load TTB1
308 mcr p15, 0, r10, c3, c0, 0 @ load domain access register
339 mcr p15, 0, r5, c10, c2, 0 @ write PRRR
340 mcr p15, 0, r6, c10, c2, 1 @ write NMRR