Lines Matching refs:c7
82 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
83 mcr p15, 0, ip, c7, c10, 4 @ drain WB
85 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
102 mcr p15, 0, r0, c7, c10, 4 @ Drain write buffer
108 mcr p15, 0, r0, c7, c0, 4 @ Wait for interrupt
132 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
134 1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate
138 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
139 mcrne p15, 0, ip, c7, c10, 4 @ drain WB
159 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
160 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
162 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
163 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
166 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
167 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
169 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
170 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
176 mcrne p15, 0, ip, c7, c10, 4 @ drain WB
204 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
205 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
209 mcr p15, 0, r0, c7, c10, 4 @ drain WB
223 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
228 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
229 mcr p15, 0, r0, c7, c10, 4 @ drain WB
248 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry
250 mcrne p15, 0, r1, c7, c10, 1 @ clean D entry
253 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
257 mcr p15, 0, r0, c7, c10, 4 @ drain WB
273 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
278 mcr p15, 0, r0, c7, c10, 4 @ drain WB
293 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
295 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
300 mcr p15, 0, r0, c7, c10, 4 @ drain WB
340 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
345 mcr p15, 0, r0, c7, c10, 4 @ drain WB
362 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
365 1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate
368 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
369 mcr p15, 0, ip, c7, c10, 4 @ drain WB
371 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
386 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
388 mcr p15, 0, r0, c7, c10, 4 @ drain WB
397 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
398 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
400 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4