Lines Matching refs:p15
39 mrc p15, 0, r0, c1, c0, 0
42 mcr p15, 0, r0, c1, c0, 0 @ disable caches
52 mcr p15, 0, ip, c7, c0, 0 @ invalidate cache
53 mrc p15, 0, ip, c1, c0, 0 @ get ctrl register
55 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
63 mcr p15, 0, r0, c7, c0, 0 @ invalidate caches
65 mcr p15, 0, r0, c6, c3 @ disable area 3~7
66 mcr p15, 0, r0, c6, c4
67 mcr p15, 0, r0, c6, c5
68 mcr p15, 0, r0, c6, c6
69 mcr p15, 0, r0, c6, c7
72 mcr p15, 0, r0, c6, c0 @ set area 0, default
82 mcr p15, 0, r0, c6, c1 @ set area 1, RAM
92 mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH
95 mcr p15, 0, r0, c2, c0 @ Region 1&2 cacheable
101 mcr p15, 0, r0, c3, c0
105 mcr p15, 0, r0, c5, c0 @ all read/write access
107 mrc p15, 0, r0, c1, c0 @ get control register