Lines Matching refs:mcr
60 mcr p15, 0, r0, c1, c0, 0 @ disable caches
80 mcr p15, 0, r1, c7, c7, 0 @ invalidate cache
81 mcr p15, 0, r0, c2, c0, 0 @ update page table ptr
82 mcr p15, 0, r1, c8, c7, 0 @ flush TLB (v4)
106 mcr p15, 0, ip, c7, c7, 0 @ invalidate cache
108 mcr p15, 0, ip, c8, c7, 0 @ flush TLB (v4)
113 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
121 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
123 mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4)
149 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
151 mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4)