Lines Matching refs:x40
66 #define HW_DCP_CH0CMDPTR (0x100 + 0 * 0x40)
67 #define HW_DCP_CH1CMDPTR (0x100 + 1 * 0x40)
68 #define HW_DCP_CH2CMDPTR (0x100 + 2 * 0x40)
69 #define HW_DCP_CH3CMDPTR (0x100 + 3 * 0x40)
73 #define HW_DCP_CH0SEMA (0x110 + 0 * 0x40)
74 #define HW_DCP_CH1SEMA (0x110 + 1 * 0x40)
75 #define HW_DCP_CH2SEMA (0x110 + 2 * 0x40)
76 #define HW_DCP_CH3SEMA (0x110 + 3 * 0x40)
82 #define HW_DCP_CH0STAT (0x120 + 0 * 0x40)
83 #define HW_DCP_CH1STAT (0x120 + 1 * 0x40)
84 #define HW_DCP_CH2STAT (0x120 + 2 * 0x40)
85 #define HW_DCP_CH3STAT (0x120 + 3 * 0x40)