Lines Matching refs:MISC_BASE
19 #define MISC_BASE VA_SPEAR6XX_ICM3_MISC_REG_BASE
21 #define SOC_CFG_CTR ((unsigned int *)(MISC_BASE + 0x000))
22 #define DIAG_CFG_CTR ((unsigned int *)(MISC_BASE + 0x004))
23 #define PLL1_CTR ((unsigned int *)(MISC_BASE + 0x008))
24 #define PLL1_FRQ ((unsigned int *)(MISC_BASE + 0x00C))
25 #define PLL1_MOD ((unsigned int *)(MISC_BASE + 0x010))
26 #define PLL2_CTR ((unsigned int *)(MISC_BASE + 0x014))
36 #define PLL2_FRQ ((unsigned int *)(MISC_BASE + 0x018))
47 #define PLL2_MOD ((unsigned int *)(MISC_BASE + 0x01C))
48 #define PLL_CLK_CFG ((unsigned int *)(MISC_BASE + 0x020))
49 #define CORE_CLK_CFG ((unsigned int *)(MISC_BASE + 0x024))
56 #define PERIP_CLK_CFG ((unsigned int *)(MISC_BASE + 0x028))
72 #define PERIP1_CLK_ENB ((unsigned int *)(MISC_BASE + 0x02C))
98 #define SOC_CORE_ID ((unsigned int *)(MISC_BASE + 0x030))
99 #define RAS_CLK_ENB ((unsigned int *)(MISC_BASE + 0x034))
100 #define PERIP1_SOF_RST ((unsigned int *)(MISC_BASE + 0x038))
104 #define SOC_USER_ID ((unsigned int *)(MISC_BASE + 0x03C))
105 #define RAS_SOF_RST ((unsigned int *)(MISC_BASE + 0x040))
106 #define PRSC1_CLK_CFG ((unsigned int *)(MISC_BASE + 0x044))
107 #define PRSC2_CLK_CFG ((unsigned int *)(MISC_BASE + 0x048))
108 #define PRSC3_CLK_CFG ((unsigned int *)(MISC_BASE + 0x04C))
115 #define AMEM_CLK_CFG ((unsigned int *)(MISC_BASE + 0x050))
116 #define EXPI_CLK_CFG ((unsigned int *)(MISC_BASE + 0x054))
117 #define CLCD_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x05C))
118 #define FIRDA_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x060))
119 #define UART_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x064))
120 #define GMAC_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x068))
121 #define RAS1_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x06C))
122 #define RAS2_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x070))
123 #define RAS3_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x074))
124 #define RAS4_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x078))
135 #define ICM1_ARB_CFG ((unsigned int *)(MISC_BASE + 0x07C))
136 #define ICM2_ARB_CFG ((unsigned int *)(MISC_BASE + 0x080))
137 #define ICM3_ARB_CFG ((unsigned int *)(MISC_BASE + 0x084))
138 #define ICM4_ARB_CFG ((unsigned int *)(MISC_BASE + 0x088))
139 #define ICM5_ARB_CFG ((unsigned int *)(MISC_BASE + 0x08C))
140 #define ICM6_ARB_CFG ((unsigned int *)(MISC_BASE + 0x090))
141 #define ICM7_ARB_CFG ((unsigned int *)(MISC_BASE + 0x094))
142 #define ICM8_ARB_CFG ((unsigned int *)(MISC_BASE + 0x098))
143 #define ICM9_ARB_CFG ((unsigned int *)(MISC_BASE + 0x09C))
144 #define DMA_CHN_CFG ((unsigned int *)(MISC_BASE + 0x0A0))
145 #define USB2_PHY_CFG ((unsigned int *)(MISC_BASE + 0x0A4))
146 #define GMAC_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0A8))
147 #define EXPI_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0AC))
148 #define PRC1_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C0))
149 #define PRC2_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C4))
150 #define PRC3_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C8))
151 #define PRC4_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0CC))
152 #define PRC1_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D0))
153 #define PRC2_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D4))
154 #define PRC3_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D8))
155 #define PRC4_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0DC))
156 #define PWRDOWN_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0E0))
157 #define COMPSSTL_1V8_CFG ((unsigned int *)(MISC_BASE + 0x0E4))
158 #define COMPSSTL_2V5_CFG ((unsigned int *)(MISC_BASE + 0x0E8))
159 #define COMPCOR_3V3_CFG ((unsigned int *)(MISC_BASE + 0x0EC))
160 #define SSTLPAD_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F0))
161 #define BIST1_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F4))
162 #define BIST2_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F8))
163 #define BIST3_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0FC))
164 #define BIST4_CFG_CTR ((unsigned int *)(MISC_BASE + 0x100))
165 #define BIST5_CFG_CTR ((unsigned int *)(MISC_BASE + 0x104))
166 #define BIST1_STS_RES ((unsigned int *)(MISC_BASE + 0x108))
167 #define BIST2_STS_RES ((unsigned int *)(MISC_BASE + 0x10C))
168 #define BIST3_STS_RES ((unsigned int *)(MISC_BASE + 0x110))
169 #define BIST4_STS_RES ((unsigned int *)(MISC_BASE + 0x114))
170 #define BIST5_STS_RES ((unsigned int *)(MISC_BASE + 0x118))
171 #define SYSERR_CFG_CTR ((unsigned int *)(MISC_BASE + 0x11C))