Lines Matching refs:MISC_BASE
19 #define MISC_BASE VA_SPEAR3XX_ICM3_MISC_REG_BASE
21 #define SOC_CFG_CTR ((unsigned int *)(MISC_BASE + 0x000))
22 #define DIAG_CFG_CTR ((unsigned int *)(MISC_BASE + 0x004))
23 #define PLL1_CTR ((unsigned int *)(MISC_BASE + 0x008))
24 #define PLL1_FRQ ((unsigned int *)(MISC_BASE + 0x00C))
25 #define PLL1_MOD ((unsigned int *)(MISC_BASE + 0x010))
26 #define PLL2_CTR ((unsigned int *)(MISC_BASE + 0x014))
36 #define PLL2_FRQ ((unsigned int *)(MISC_BASE + 0x018))
47 #define PLL2_MOD ((unsigned int *)(MISC_BASE + 0x01C))
48 #define PLL_CLK_CFG ((unsigned int *)(MISC_BASE + 0x020))
49 #define CORE_CLK_CFG ((unsigned int *)(MISC_BASE + 0x024))
56 #define PERIP_CLK_CFG ((unsigned int *)(MISC_BASE + 0x028))
69 #define PERIP1_CLK_ENB ((unsigned int *)(MISC_BASE + 0x02C))
88 #define SOC_CORE_ID ((unsigned int *)(MISC_BASE + 0x030))
89 #define RAS_CLK_ENB ((unsigned int *)(MISC_BASE + 0x034))
90 #define PERIP1_SOF_RST ((unsigned int *)(MISC_BASE + 0x038))
94 #define SOC_USER_ID ((unsigned int *)(MISC_BASE + 0x03C))
95 #define RAS_SOF_RST ((unsigned int *)(MISC_BASE + 0x040))
96 #define PRSC1_CLK_CFG ((unsigned int *)(MISC_BASE + 0x044))
97 #define PRSC2_CLK_CFG ((unsigned int *)(MISC_BASE + 0x048))
98 #define PRSC3_CLK_CFG ((unsigned int *)(MISC_BASE + 0x04C))
105 #define AMEM_CLK_CFG ((unsigned int *)(MISC_BASE + 0x050))
106 #define EXPI_CLK_CFG ((unsigned int *)(MISC_BASE + 0x054))
107 #define CLCD_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x05C))
108 #define FIRDA_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x060))
109 #define UART_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x064))
110 #define GMAC_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x068))
111 #define RAS1_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x06C))
112 #define RAS2_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x070))
113 #define RAS3_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x074))
114 #define RAS4_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x078))
125 #define ICM1_ARB_CFG ((unsigned int *)(MISC_BASE + 0x07C))
126 #define ICM2_ARB_CFG ((unsigned int *)(MISC_BASE + 0x080))
127 #define ICM3_ARB_CFG ((unsigned int *)(MISC_BASE + 0x084))
128 #define ICM4_ARB_CFG ((unsigned int *)(MISC_BASE + 0x088))
129 #define ICM5_ARB_CFG ((unsigned int *)(MISC_BASE + 0x08C))
130 #define ICM6_ARB_CFG ((unsigned int *)(MISC_BASE + 0x090))
131 #define ICM7_ARB_CFG ((unsigned int *)(MISC_BASE + 0x094))
132 #define ICM8_ARB_CFG ((unsigned int *)(MISC_BASE + 0x098))
133 #define ICM9_ARB_CFG ((unsigned int *)(MISC_BASE + 0x09C))
134 #define DMA_CHN_CFG ((unsigned int *)(MISC_BASE + 0x0A0))
135 #define USB2_PHY_CFG ((unsigned int *)(MISC_BASE + 0x0A4))
136 #define GMAC_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0A8))
137 #define EXPI_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0AC))
138 #define PRC1_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C0))
139 #define PRC2_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C4))
140 #define PRC3_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C8))
141 #define PRC4_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0CC))
142 #define PRC1_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D0))
143 #define PRC2_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D4))
144 #define PRC3_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D8))
145 #define PRC4_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0DC))
146 #define PWRDOWN_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0E0))
147 #define COMPSSTL_1V8_CFG ((unsigned int *)(MISC_BASE + 0x0E4))
148 #define COMPSSTL_2V5_CFG ((unsigned int *)(MISC_BASE + 0x0E8))
149 #define COMPCOR_3V3_CFG ((unsigned int *)(MISC_BASE + 0x0EC))
150 #define SSTLPAD_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F0))
151 #define BIST1_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F4))
152 #define BIST2_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F8))
153 #define BIST3_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0FC))
154 #define BIST4_CFG_CTR ((unsigned int *)(MISC_BASE + 0x100))
155 #define BIST5_CFG_CTR ((unsigned int *)(MISC_BASE + 0x104))
156 #define BIST1_STS_RES ((unsigned int *)(MISC_BASE + 0x108))
157 #define BIST2_STS_RES ((unsigned int *)(MISC_BASE + 0x10C))
158 #define BIST3_STS_RES ((unsigned int *)(MISC_BASE + 0x110))
159 #define BIST4_STS_RES ((unsigned int *)(MISC_BASE + 0x114))
160 #define BIST5_STS_RES ((unsigned int *)(MISC_BASE + 0x118))
161 #define SYSERR_CFG_CTR ((unsigned int *)(MISC_BASE + 0x11C))