• Home
  • History
  • Annotate
  • Raw
  • Download
  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-shmobile/

Lines Matching refs:CLKDEV_CON_ID

270 #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
275 CLKDEV_CON_ID("r_clk", &r_clk),
276 CLKDEV_CON_ID("extalc1", &sh7377_extalc1_clk),
277 CLKDEV_CON_ID("extal2", &sh7377_extal2_clk),
278 CLKDEV_CON_ID("extalc1_div2_clk", &extalc1_div2_clk),
279 CLKDEV_CON_ID("extal2_div2_clk", &extal2_div2_clk),
280 CLKDEV_CON_ID("extal2_div4_clk", &extal2_div4_clk),
281 CLKDEV_CON_ID("pllc1_clk", &pllc1_clk),
282 CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk),
283 CLKDEV_CON_ID("pllc2_clk", &pllc2_clk),
286 CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]),
287 CLKDEV_CON_ID("zg_clk", &div4_clks[DIV4_ZG]),
288 CLKDEV_CON_ID("b_clk", &div4_clks[DIV4_B]),
289 CLKDEV_CON_ID("m1_clk", &div4_clks[DIV4_M1]),
290 CLKDEV_CON_ID("csir_clk", &div4_clks[DIV4_CSIR]),
291 CLKDEV_CON_ID("ztr_clk", &div4_clks[DIV4_ZTR]),
292 CLKDEV_CON_ID("zt_clk", &div4_clks[DIV4_ZT]),
293 CLKDEV_CON_ID("z_clk", &div4_clks[DIV4_Z]),
294 CLKDEV_CON_ID("hp_clk", &div4_clks[DIV4_HP]),
295 CLKDEV_CON_ID("zs_clk", &div4_clks[DIV4_ZS]),
296 CLKDEV_CON_ID("zb_clk", &div4_clks[DIV4_ZB]),
297 CLKDEV_CON_ID("zb3_clk", &div4_clks[DIV4_ZB3]),
298 CLKDEV_CON_ID("cp_clk", &div4_clks[DIV4_CP]),
301 CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]),
302 CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]),
303 CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]),
304 CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]),
305 CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]),
306 CLKDEV_CON_ID("fsi_clk", &div6_clks[DIV6_FSI]),
307 CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]),
308 CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),
309 CLKDEV_CON_ID("msu_clk", &div6_clks[DIV6_MSU]),
310 CLKDEV_CON_ID("mvi3_clk", &div6_clks[DIV6_MVI3]),
311 CLKDEV_CON_ID("hdmi_clk", &div6_clks[DIV6_HDMI]),
312 CLKDEV_CON_ID("mf1_clk", &div6_clks[DIV6_MF1]),
313 CLKDEV_CON_ID("mf2_clk", &div6_clks[DIV6_MF2]),
314 CLKDEV_CON_ID("dsit_clk", &div6_clks[DIV6_DSIT]),
315 CLKDEV_CON_ID("dsip_clk", &div6_clks[DIV6_DSIP]),
336 CLKDEV_CON_ID("cmt1", &mstp_clks[MSTP329]), /* CMT10 */