Lines Matching refs:sources
37 .sources = &clk_src_apll,
46 .sources = &clk_src_mpll,
55 .sources = &clk_src_epll,
59 /* Possible clock sources for ARM Mux */
66 .sources = clk_src_arm_list,
75 .sources = &clk_src_arm,
85 /* Possible clock sources for D0 Mux */
92 .sources = clk_src_d0_list,
101 .sources = &clk_src_d0,
111 /* Possible clock sources for D0SYNC Mux */
118 .sources = clk_src_d0sync_list,
127 .sources = &clk_src_d0sync,
131 /* Possible clock sources for D1 Mux */
138 .sources = clk_src_d1_list,
147 .sources = &clk_src_d1,
151 /* Possible clock sources for D1SYNC Mux */
158 .sources = clk_src_d1sync_list,
167 .sources = &clk_src_d1sync,
207 .sources = &clk_src_apll,
216 .sources = &clk_src_arm,
225 .sources = &clk_src_d1sync,
234 .sources = &clk_src_d0sync,
243 .sources = &clk_src_d0sync,
252 .sources = &clk_src_d1sync,