Lines Matching refs:dpll_sys_ref_clk
215 static struct clk dpll_sys_ref_clk = {
216 .name = "dpll_sys_ref_clk",
228 { .parent = &dpll_sys_ref_clk, .rates = div_1_0_rates },
235 .parent = &dpll_sys_ref_clk,
383 { .parent = &dpll_sys_ref_clk, .rates = div_1_0_rates },
390 .parent = &dpll_sys_ref_clk,
403 .clk_ref = &dpll_sys_ref_clk,
421 .parent = &dpll_sys_ref_clk,
599 { .parent = &dpll_sys_ref_clk, .rates = div_1_0_rates },
606 .parent = &dpll_sys_ref_clk,
615 .clk_ref = &dpll_sys_ref_clk,
633 .parent = &dpll_sys_ref_clk,
675 .clk_ref = &dpll_sys_ref_clk,
693 .parent = &dpll_sys_ref_clk,
727 { .parent = &dpll_sys_ref_clk, .rates = div_1_0_rates },
734 .parent = &dpll_sys_ref_clk,
747 .clk_ref = &dpll_sys_ref_clk,
765 .parent = &dpll_sys_ref_clk,
861 .clk_bypass = &dpll_sys_ref_clk,
862 .clk_ref = &dpll_sys_ref_clk,
880 .parent = &dpll_sys_ref_clk,
917 .clk_ref = &dpll_sys_ref_clk,
936 .parent = &dpll_sys_ref_clk,
2490 CLK(NULL, "dpll_sys_ref_clk", &dpll_sys_ref_clk, CK_443X),