Lines Matching refs:x8
47 #define MXC_PLL_DP_CTL_RCP 0x8
52 #define MXC_PLL_DP_CONFIG_BIST 0x8
505 #define MXC_CORTEXA8_PLAT_PIC (MX51_CORTEXA8_BASE + 0x8)
535 #define MXC_GPC_VCR (MX51_GPC_BASE + 0x8)
561 #define MXC_SRPG_NEON_PDNSCR (MXC_SRPG_NEON_BASE + 0x8)
565 #define MXC_SRPG_ARM_PDNSCR (MXC_SRPG_ARM_BASE + 0x8)
569 #define MXC_SRPG_EMPGC0_PDNSCR (MXC_SRPG_EMPGC0_BASE + 0x8)
573 #define MXC_SRPG_EMPGC1_PDNSCR (MXC_SRPG_EMPGC1_BASE + 0x8)
577 #define MXC_SRPG_MEGAMIX_PDNSCR (MXC_SRPG_MEGAMIX_BASE + 0x8)
581 #define MXC_SRPGC_EMI_PDNSCR (MXC_SRPGC_EMI_BASE + 0x8)