Lines Matching refs:MX51_CORTEXA8_BASE
18 #define MX51_CORTEXA8_BASE MX51_IO_ADDRESS(MX51_ARM_BASE_ADDR)
503 #define MXC_CORTEXA8_PLAT_PVID (MX51_CORTEXA8_BASE + 0x0)
504 #define MXC_CORTEXA8_PLAT_GPC (MX51_CORTEXA8_BASE + 0x4)
505 #define MXC_CORTEXA8_PLAT_PIC (MX51_CORTEXA8_BASE + 0x8)
506 #define MXC_CORTEXA8_PLAT_LPC (MX51_CORTEXA8_BASE + 0xC)
507 #define MXC_CORTEXA8_PLAT_NEON_LPC (MX51_CORTEXA8_BASE + 0x10)
508 #define MXC_CORTEXA8_PLAT_ICGC (MX51_CORTEXA8_BASE + 0x14)
509 #define MXC_CORTEXA8_PLAT_AMC (MX51_CORTEXA8_BASE + 0x18)
510 #define MXC_CORTEXA8_PLAT_NMC (MX51_CORTEXA8_BASE + 0x20)
511 #define MXC_CORTEXA8_PLAT_NMS (MX51_CORTEXA8_BASE + 0x24)