Lines Matching refs:MV78XX0_REGS_VIRT_BASE
52 #define MV78XX0_REGS_VIRT_BASE 0xfef00000
66 #define DDR_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x00000)
71 #define DEV_BUS_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x10000)
88 #define PCIE00_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x40000)
89 #define PCIE01_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x44000)
90 #define PCIE02_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x48000)
91 #define PCIE03_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x4c000)
100 #define PCIE10_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x80000)
101 #define PCIE11_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x84000)
102 #define PCIE12_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x88000)
103 #define PCIE13_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x8c000)