Lines Matching refs:A11S_CLK_CNTL_ADDR
37 #define A11S_CLK_CNTL_ADDR (MSM_CSR_BASE + 0x100)
225 reg_clkctl = readl(A11S_CLK_CNTL_ADDR);
228 writel(reg_clkctl, A11S_CLK_CNTL_ADDR);
231 reg_clkctl = readl(A11S_CLK_CNTL_ADDR);
234 writel(reg_clkctl, A11S_CLK_CNTL_ADDR);
244 reg_clkctl = readl(A11S_CLK_CNTL_ADDR);
247 writel(reg_clkctl, A11S_CLK_CNTL_ADDR);
250 reg_clkctl = readl(A11S_CLK_CNTL_ADDR);
253 writel(reg_clkctl, A11S_CLK_CNTL_ADDR);
327 reg_clkctl = readl(A11S_CLK_CNTL_ADDR);
329 writel(reg_clkctl, A11S_CLK_CNTL_ADDR);
428 sel = (readl(A11S_CLK_CNTL_ADDR) >> 12) & 0x7;
430 div = (readl(A11S_CLK_CNTL_ADDR) >> 8) & 0x0f;
433 sel = (readl(A11S_CLK_CNTL_ADDR) >> 4) & 0x07;
435 div = readl(A11S_CLK_CNTL_ADDR) & 0x0f;