Lines Matching refs:MISC_MEM_MAP
249 #define MISC_MEM_MAP(offs) (void __iomem *)(CNS3XXX_MISC_BASE_VIRT + (offs))
251 #define MISC_MEMORY_REMAP_REG MISC_MEM_MAP(0x00)
252 #define MISC_CHIP_CONFIG_REG MISC_MEM_MAP(0x04)
253 #define MISC_DEBUG_PROBE_DATA_REG MISC_MEM_MAP(0x08)
254 #define MISC_DEBUG_PROBE_SELECTION_REG MISC_MEM_MAP(0x0C)
255 #define MISC_IO_PIN_FUNC_SELECTION_REG MISC_MEM_MAP(0x10)
256 #define MISC_GPIOA_PIN_ENABLE_REG MISC_MEM_MAP(0x14)
257 #define MISC_GPIOB_PIN_ENABLE_REG MISC_MEM_MAP(0x18)
258 #define MISC_IO_PAD_DRIVE_STRENGTH_CTRL_A MISC_MEM_MAP(0x1C)
259 #define MISC_IO_PAD_DRIVE_STRENGTH_CTRL_B MISC_MEM_MAP(0x20)
260 #define MISC_GPIOA_15_0_PULL_CTRL_REG MISC_MEM_MAP(0x24)
261 #define MISC_GPIOA_16_31_PULL_CTRL_REG MISC_MEM_MAP(0x28)
262 #define MISC_GPIOB_15_0_PULL_CTRL_REG MISC_MEM_MAP(0x2C)
263 #define MISC_GPIOB_16_31_PULL_CTRL_REG MISC_MEM_MAP(0x30)
264 #define MISC_IO_PULL_CTRL_REG MISC_MEM_MAP(0x34)
265 #define MISC_E_FUSE_31_0_REG MISC_MEM_MAP(0x40)
266 #define MISC_E_FUSE_63_32_REG MISC_MEM_MAP(0x44)
267 #define MISC_E_FUSE_95_64_REG MISC_MEM_MAP(0x48)
268 #define MISC_E_FUSE_127_96_REG MISC_MEM_MAP(0x4C)
269 #define MISC_SOFTWARE_TEST_1_REG MISC_MEM_MAP(0x50)
270 #define MISC_SOFTWARE_TEST_2_REG MISC_MEM_MAP(0x54)
272 #define MISC_SATA_POWER_MODE MISC_MEM_MAP(0x310)
274 #define MISC_USB_CFG_REG MISC_MEM_MAP(0x800)
275 #define MISC_USB_STS_REG MISC_MEM_MAP(0x804)
276 #define MISC_USBPHY00_CFG_REG MISC_MEM_MAP(0x808)
277 #define MISC_USBPHY01_CFG_REG MISC_MEM_MAP(0x80c)
278 #define MISC_USBPHY10_CFG_REG MISC_MEM_MAP(0x810)
279 #define MISC_USBPHY11_CFG_REG MISC_MEM_MAP(0x814)
281 #define MISC_PCIEPHY_CMCTL(x) MISC_MEM_MAP(0x900 + (x) * 0x004)
282 #define MISC_PCIEPHY_CTL(x) MISC_MEM_MAP(0x940 + (x) * 0x100)
283 #define MISC_PCIE_AXIS_AWMISC(x) MISC_MEM_MAP(0x944 + (x) * 0x100)
284 #define MISC_PCIE_AXIS_ARMISC(x) MISC_MEM_MAP(0x948 + (x) * 0x100)
285 #define MISC_PCIE_AXIS_RMISC(x) MISC_MEM_MAP(0x94C + (x) * 0x100)
286 #define MISC_PCIE_AXIS_BMISC(x) MISC_MEM_MAP(0x950 + (x) * 0x100)
287 #define MISC_PCIE_AXIM_RMISC(x) MISC_MEM_MAP(0x954 + (x) * 0x100)
288 #define MISC_PCIE_AXIM_BMISC(x) MISC_MEM_MAP(0x958 + (x) * 0x100)
289 #define MISC_PCIE_CTRL(x) MISC_MEM_MAP(0x95C + (x) * 0x100)
290 #define MISC_PCIE_PM_DEBUG(x) MISC_MEM_MAP(0x960 + (x) * 0x100)
291 #define MISC_PCIE_RFC_DEBUG(x) MISC_MEM_MAP(0x964 + (x) * 0x100)
292 #define MISC_PCIE_CXPL_DEBUGL(x) MISC_MEM_MAP(0x968 + (x) * 0x100)
293 #define MISC_PCIE_CXPL_DEBUGH(x) MISC_MEM_MAP(0x96C + (x) * 0x100)
294 #define MISC_PCIE_DIAG_DEBUGH(x) MISC_MEM_MAP(0x970 + (x) * 0x100)
295 #define MISC_PCIE_W1CLR(x) MISC_MEM_MAP(0x974 + (x) * 0x100)
296 #define MISC_PCIE_INT_MASK(x) MISC_MEM_MAP(0x978 + (x) * 0x100)
297 #define MISC_PCIE_INT_STATUS(x) MISC_MEM_MAP(0x97C + (x) * 0x100)