Lines Matching refs:irqnr
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
30 ldr \irqnr, [\base, #0x10] @ mask with enable register
31 ands \irqstat, \irqstat, \irqnr
32 mov \irqnr, #IRQ_INTC0_START
38 ldr \irqnr, [\base, #0x10] @ mask with enable register
39 ands \irqstat, \irqstat, \irqnr
40 mov \irqnr, #IRQ_INTC1_START
46 ldr \irqnr, [\base, #0x10] @ mask with enable register
47 ands \irqstat, \irqstat, \irqnr
48 mov \irqnr, #0xffffffff @ code meaning no interrupt bits set
52 mov \irqnr, #IRQ_SINTC_START @ something is set, so fixup return value
57 addeq \irqnr, \irqnr, #16
61 addeq \irqnr, \irqnr, #8
65 addeq \irqnr, \irqnr, #4
69 addeq \irqnr, \irqnr, #2
72 addeq \irqnr, \irqnr, #1
75 1002: @ irqnr will be set to 0xffffffff if no irq bits are set