Lines Matching refs:phaseValue
511 uint32_t phaseValue;
519 phaseValue = 0;
525 phaseValue = pChipcHw->VPMClock;
528 prevPhaseComp = phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP;
536 phaseValue = pChipcHw->VPMClock;
538 if ((phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP) == 0x0) {
546 } while (((prevPhaseComp == (phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP)) || /* Look for a transition */
547 ((phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP) != 0x0)) && /* Look for a falling edge */
558 for (count = 0; (count < 5) && ((phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP) == 0); count++) {
565 phaseValue = pChipcHw->VPMClock;
582 for (count = 0; (count < 3) && ((phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP) == 0); count++) {
589 phaseValue = pChipcHw->VPMClock;
613 phaseValue = pChipcHw->VPMClock;
623 if ((phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP) == 0) {
632 prevPhaseComp = phaseValue;
641 phaseValue = pChipcHw->VPMClock;
643 if ((phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP) == 0x0) {
652 } while (((prevPhaseComp == (phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP)) || ((phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP) != 0x0)) && (adjustCount < MAX_PHASE_ADJUST_COUNT));
696 uint32_t phaseValue = 0;
707 phaseValue = chipcHw_getVpmHwPhaseAlignStatus();
710 if (phaseValue > 0xF) {
713 } else if (phaseValue < 0xF) {