Lines Matching refs:at91_set_A_periph
323 at91_set_A_periph(AT91_PIN_PA17, 0); /* ETXCK_EREFCK */
324 at91_set_A_periph(AT91_PIN_PA15, 0); /* ERXDV */
325 at91_set_A_periph(AT91_PIN_PA12, 0); /* ERX0 */
326 at91_set_A_periph(AT91_PIN_PA13, 0); /* ERX1 */
327 at91_set_A_periph(AT91_PIN_PA16, 0); /* ERXER */
328 at91_set_A_periph(AT91_PIN_PA14, 0); /* ETXEN */
329 at91_set_A_periph(AT91_PIN_PA10, 0); /* ETX0 */
330 at91_set_A_periph(AT91_PIN_PA11, 0); /* ETX1 */
331 at91_set_A_periph(AT91_PIN_PA19, 0); /* EMDIO */
332 at91_set_A_periph(AT91_PIN_PA18, 0); /* EMDC */
523 at91_set_A_periph(AT91_PIN_PA20, 0); /* TWD */
526 at91_set_A_periph(AT91_PIN_PA21, 0); /* TWCK */
531 at91_set_A_periph(AT91_PIN_PB10, 0); /* TWD */
534 at91_set_A_periph(AT91_PIN_PB11, 0); /* TWCK */
636 at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI0_MISO */
637 at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI0_MOSI */
638 at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI0_SPCK */
644 at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_MISO */
645 at91_set_A_periph(AT91_PIN_PB15, 0); /* SPI1_MOSI */
646 at91_set_A_periph(AT91_PIN_PB16, 0); /* SPI1_SPCK */
695 at91_set_A_periph(AT91_PIN_PD8, 0); /* AC97FS */
696 at91_set_A_periph(AT91_PIN_PD9, 0); /* AC97CK */
697 at91_set_A_periph(AT91_PIN_PD7, 0); /* AC97TX */
698 at91_set_A_periph(AT91_PIN_PD6, 0); /* AC97RX */
750 at91_set_A_periph(AT91_PIN_PE0, 0); /* LCDDPWR */
752 at91_set_A_periph(AT91_PIN_PE2, 0); /* LCDCC */
753 at91_set_A_periph(AT91_PIN_PE3, 0); /* LCDVSYNC */
754 at91_set_A_periph(AT91_PIN_PE4, 0); /* LCDHSYNC */
755 at91_set_A_periph(AT91_PIN_PE5, 0); /* LCDDOTCK */
756 at91_set_A_periph(AT91_PIN_PE6, 0); /* LCDDEN */
757 at91_set_A_periph(AT91_PIN_PE7, 0); /* LCDD0 */
758 at91_set_A_periph(AT91_PIN_PE8, 0); /* LCDD1 */
759 at91_set_A_periph(AT91_PIN_PE9, 0); /* LCDD2 */
760 at91_set_A_periph(AT91_PIN_PE10, 0); /* LCDD3 */
761 at91_set_A_periph(AT91_PIN_PE11, 0); /* LCDD4 */
762 at91_set_A_periph(AT91_PIN_PE12, 0); /* LCDD5 */
763 at91_set_A_periph(AT91_PIN_PE13, 0); /* LCDD6 */
764 at91_set_A_periph(AT91_PIN_PE14, 0); /* LCDD7 */
765 at91_set_A_periph(AT91_PIN_PE15, 0); /* LCDD8 */
766 at91_set_A_periph(AT91_PIN_PE16, 0); /* LCDD9 */
767 at91_set_A_periph(AT91_PIN_PE17, 0); /* LCDD10 */
768 at91_set_A_periph(AT91_PIN_PE18, 0); /* LCDD11 */
769 at91_set_A_periph(AT91_PIN_PE19, 0); /* LCDD12 */
770 at91_set_A_periph(AT91_PIN_PE20, 0); /* LCDD13 */
771 at91_set_A_periph(AT91_PIN_PE21, 0); /* LCDD14 */
772 at91_set_A_periph(AT91_PIN_PE22, 0); /* LCDD15 */
773 at91_set_A_periph(AT91_PIN_PE23, 0); /* LCDD16 */
774 at91_set_A_periph(AT91_PIN_PE24, 0); /* LCDD17 */
775 at91_set_A_periph(AT91_PIN_PE25, 0); /* LCDD18 */
776 at91_set_A_periph(AT91_PIN_PE26, 0); /* LCDD19 */
777 at91_set_A_periph(AT91_PIN_PE27, 0); /* LCDD20 */
778 at91_set_A_periph(AT91_PIN_PE28, 0); /* LCDD21 */
779 at91_set_A_periph(AT91_PIN_PE29, 0); /* LCDD22 */
780 at91_set_A_periph(AT91_PIN_PE30, 0); /* LCDD23 */
1053 at91_set_A_periph(AT91_PIN_PD1, 1);
1055 at91_set_A_periph(AT91_PIN_PD0, 1);
1057 at91_set_A_periph(AT91_PIN_PD2, 1);
1059 at91_set_A_periph(AT91_PIN_PD3, 1);
1061 at91_set_A_periph(AT91_PIN_PD4, 1);
1063 at91_set_A_periph(AT91_PIN_PD5, 1);
1095 at91_set_A_periph(AT91_PIN_PD14, 1);
1097 at91_set_A_periph(AT91_PIN_PD12, 1);
1099 at91_set_A_periph(AT91_PIN_PD10, 1);
1101 at91_set_A_periph(AT91_PIN_PD11, 1);
1103 at91_set_A_periph(AT91_PIN_PD13, 1);
1105 at91_set_A_periph(AT91_PIN_PD15, 1);
1185 at91_set_A_periph(AT91_PIN_PB12, 0); /* DRXD */
1186 at91_set_A_periph(AT91_PIN_PB13, 1); /* DTXD */
1223 at91_set_A_periph(AT91_PIN_PB19, 1); /* TXD0 */
1224 at91_set_A_periph(AT91_PIN_PB18, 0); /* RXD0 */
1266 at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD1 */
1267 at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD1 */
1270 at91_set_A_periph(AT91_PIN_PD16, 0); /* RTS1 */
1272 at91_set_A_periph(AT91_PIN_PD17, 0); /* CTS1 */
1309 at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD2 */
1310 at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD2 */
1352 at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD3 */
1353 at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD3 */