Lines Matching refs:at91_set_A_periph
240 at91_set_A_periph(AT91_PIN_PB21, 0); /* ETXCK_EREFCK */
241 at91_set_A_periph(AT91_PIN_PB22, 0); /* ERXDV */
242 at91_set_A_periph(AT91_PIN_PB25, 0); /* ERX0 */
243 at91_set_A_periph(AT91_PIN_PB26, 0); /* ERX1 */
244 at91_set_A_periph(AT91_PIN_PB27, 0); /* ERXER */
245 at91_set_A_periph(AT91_PIN_PB28, 0); /* ETXEN */
246 at91_set_A_periph(AT91_PIN_PB23, 0); /* ETX0 */
247 at91_set_A_periph(AT91_PIN_PB24, 0); /* ETX1 */
248 at91_set_A_periph(AT91_PIN_PB30, 0); /* EMDIO */
249 at91_set_A_periph(AT91_PIN_PB29, 0); /* EMDC */
345 at91_set_A_periph(AT91_PIN_PA2, 0);
348 at91_set_A_periph(AT91_PIN_PA1, 1);
351 at91_set_A_periph(AT91_PIN_PA0, 1);
353 at91_set_A_periph(AT91_PIN_PA3, 1);
354 at91_set_A_periph(AT91_PIN_PA4, 1);
355 at91_set_A_periph(AT91_PIN_PA5, 1);
363 at91_set_A_periph(AT91_PIN_PA16, 0);
366 at91_set_A_periph(AT91_PIN_PA17, 1);
369 at91_set_A_periph(AT91_PIN_PA18, 1);
371 at91_set_A_periph(AT91_PIN_PA19, 1);
372 at91_set_A_periph(AT91_PIN_PA20, 1);
373 at91_set_A_periph(AT91_PIN_PA21, 1);
622 at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */
623 at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */
624 at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */
750 at91_set_A_periph(AT91_PIN_PB19, 1); /* enable PWM0 */
809 at91_set_A_periph(AT91_PIN_PA6, 0); /* AC97FS */
810 at91_set_A_periph(AT91_PIN_PA7, 0); /* AC97CK */
811 at91_set_A_periph(AT91_PIN_PA8, 0); /* AC97TX */
812 at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */
867 at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
868 at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
869 at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
871 at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */
872 at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */
873 at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */
874 at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */
875 at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */
876 at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */
877 at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */
878 at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */
879 at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */
880 at91_set_A_periph(AT91_PIN_PC17, 0); /* LCDD13 */
881 at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */
882 at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */
883 at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */
884 at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */
885 at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */
886 at91_set_A_periph(AT91_PIN_PC25, 0); /* LCDD21 */
887 at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */
888 at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */
932 at91_set_A_periph(AT91_PIN_PB0, 1);
934 at91_set_A_periph(AT91_PIN_PB1, 1);
936 at91_set_A_periph(AT91_PIN_PB2, 1);
938 at91_set_A_periph(AT91_PIN_PB3, 1);
940 at91_set_A_periph(AT91_PIN_PB4, 1);
942 at91_set_A_periph(AT91_PIN_PB5, 1);
974 at91_set_A_periph(AT91_PIN_PB6, 1);
976 at91_set_A_periph(AT91_PIN_PB7, 1);
978 at91_set_A_periph(AT91_PIN_PB8, 1);
980 at91_set_A_periph(AT91_PIN_PB9, 1);
982 at91_set_A_periph(AT91_PIN_PB10, 1);
984 at91_set_A_periph(AT91_PIN_PB11, 1);
1064 at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */
1065 at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */
1102 at91_set_A_periph(AT91_PIN_PA22, 1); /* TXD0 */
1103 at91_set_A_periph(AT91_PIN_PA23, 0); /* RXD0 */
1106 at91_set_A_periph(AT91_PIN_PA24, 0); /* RTS0 */
1108 at91_set_A_periph(AT91_PIN_PA25, 0); /* CTS0 */
1145 at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */
1146 at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */
1188 at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */
1189 at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */