Lines Matching refs:io7
74 io7_get_irq_ctl(unsigned int irq, struct io7 **pio7)
78 struct io7 *io7;
82 if (!(io7 = marvel_find_io7(pid))) {
84 "%s for nonexistent io7 -- vec %x, pid %d\n",
99 ctl = &io7->csrs->PO7_LSI_CTL[irq & 0xff].csr; /* assume LSI */
101 ctl = &io7->csrs->PO7_MSI_CTL[((irq - 0x80) >> 5) & 0x0f].csr;
103 if (pio7) *pio7 = io7;
111 struct io7 *io7;
113 ctl = io7_get_irq_ctl(irq, &io7);
114 if (!ctl || !io7) {
120 spin_lock(&io7->irq_lock);
124 spin_unlock(&io7->irq_lock);
131 struct io7 *io7;
133 ctl = io7_get_irq_ctl(irq, &io7);
134 if (!ctl || !io7) {
140 spin_lock(&io7->irq_lock);
144 spin_unlock(&io7->irq_lock);
204 io7_redirect_irq(struct io7 *io7,
220 io7_redirect_one_lsi(struct io7 *io7, unsigned int which, unsigned int where)
227 val = io7->csrs->PO7_LSI_CTL[which].csr;
231 io7->csrs->PO7_LSI_CTL[which].csr = val;
233 io7->csrs->PO7_LSI_CTL[which].csr;
237 io7_redirect_one_msi(struct io7 *io7, unsigned int which, unsigned int where)
244 val = io7->csrs->PO7_MSI_CTL[which].csr;
248 io7->csrs->PO7_MSI_CTL[which].csr = val;
250 io7->csrs->PO7_MSI_CTL[which].csr;
254 init_one_io7_lsi(struct io7 *io7, unsigned int which, unsigned int where)
259 io7->csrs->PO7_LSI_CTL[which].csr = ((unsigned long)where << 14);
261 io7->csrs->PO7_LSI_CTL[which].csr;
265 init_one_io7_msi(struct io7 *io7, unsigned int which, unsigned int where)
270 io7->csrs->PO7_MSI_CTL[which].csr = ((unsigned long)where << 14);
272 io7->csrs->PO7_MSI_CTL[which].csr;
276 init_io7_irqs(struct io7 *io7,
280 long base = (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT) + 16;
284 io7->pe, base);
297 spin_lock(&io7->irq_lock);
300 io7_redirect_irq(io7, &io7->csrs->HLT_CTL.csr, boot_cpuid);
301 io7_redirect_irq(io7, &io7->csrs->HPI_CTL.csr, boot_cpuid);
302 io7_redirect_irq(io7, &io7->csrs->CRD_CTL.csr, boot_cpuid);
303 io7_redirect_irq(io7, &io7->csrs->STV_CTL.csr, boot_cpuid);
304 io7_redirect_irq(io7, &io7->csrs->HEI_CTL.csr, boot_cpuid);
314 init_one_io7_lsi(io7, i, boot_cpuid);
316 init_one_io7_lsi(io7, 0x74, boot_cpuid);
317 init_one_io7_lsi(io7, 0x75, boot_cpuid);
327 init_one_io7_msi(io7, i, boot_cpuid);
329 spin_unlock(&io7->irq_lock);
336 struct io7 *io7 = NULL;
344 /* Init the io7 irqs. */
345 for (io7 = NULL; (io7 = marvel_next_io7(io7)) != NULL; )
346 init_io7_irqs(io7, &io7_lsi_irq_type, &io7_msi_irq_type);
354 struct io7 *io7 = io7_port->io7;
388 (irq + 16) | (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT),
389 (irq + 16) | (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT));
394 irq |= io7->pe << MARVEL_IRQ_VEC_PE_SHIFT; /* merge the pid */
402 struct io7 *io7;
410 /* Clear any io7 errors. */
411 for (io7 = NULL; (io7 = marvel_next_io7(io7)) != NULL; )
412 io7_clear_errors(io7);
476 struct io7 *io7 = marvel_find_io7(cpuid);
479 if (!io7)
488 io7_redirect_irq(io7, &io7->csrs->HLT_CTL.csr, cpuid);
489 io7_redirect_irq(io7, &io7->csrs->HPI_CTL.csr, cpuid);
490 io7_redirect_irq(io7, &io7->csrs->CRD_CTL.csr, cpuid);
491 io7_redirect_irq(io7, &io7->csrs->STV_CTL.csr, cpuid);
492 io7_redirect_irq(io7, &io7->csrs->HEI_CTL.csr, cpuid);
496 io7_redirect_one_lsi(io7, i, cpuid);
498 io7_redirect_one_lsi(io7, 0x74, cpuid);
499 io7_redirect_one_lsi(io7, 0x75, cpuid);
503 io7_redirect_one_msi(io7, i, cpuid);