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  • only in /netgear-R7000-V1.0.7.12_1.2.5/ap/gpl/openssl/crypto/modes/

Lines Matching defs:Htable

121 static void gcm_init_8bit(u128 Htable[256], u64 H[2])
126 Htable[0].hi = 0;
127 Htable[0].lo = 0;
131 for (Htable[128] = V, i = 64; i > 0; i >>= 1) {
133 Htable[i] = V;
137 u128 *Hi = Htable + i, H0 = *Hi;
139 Hi[j].hi = H0.hi ^ Htable[j].hi;
140 Hi[j].lo = H0.lo ^ Htable[j].lo;
145 static void gcm_gmult_8bit(u64 Xi[2], const u128 Htable[256])
224 Z.hi ^= Htable[n].hi;
225 Z.lo ^= Htable[n].lo;
263 # define GCM_MUL(ctx,Xi) gcm_gmult_8bit(ctx->Xi.u,ctx->Htable)
267 static void gcm_init_4bit(u128 Htable[16], u64 H[2])
274 Htable[0].hi = 0;
275 Htable[0].lo = 0;
280 for (Htable[8] = V, i = 4; i > 0; i >>= 1) {
282 Htable[i] = V;
286 u128 *Hi = Htable + i;
289 Hi[j].hi = V.hi ^ Htable[j].hi;
290 Hi[j].lo = V.lo ^ Htable[j].lo;
294 Htable[8] = V;
296 Htable[4] = V;
298 Htable[2] = V;
300 Htable[1] = V;
301 Htable[3].hi = V.hi ^ Htable[2].hi, Htable[3].lo = V.lo ^ Htable[2].lo;
302 V = Htable[4];
303 Htable[5].hi = V.hi ^ Htable[1].hi, Htable[5].lo = V.lo ^ Htable[1].lo;
304 Htable[6].hi = V.hi ^ Htable[2].hi, Htable[6].lo = V.lo ^ Htable[2].lo;
305 Htable[7].hi = V.hi ^ Htable[3].hi, Htable[7].lo = V.lo ^ Htable[3].lo;
306 V = Htable[8];
307 Htable[9].hi = V.hi ^ Htable[1].hi, Htable[9].lo = V.lo ^ Htable[1].lo;
308 Htable[10].hi = V.hi ^ Htable[2].hi, Htable[10].lo = V.lo ^ Htable[2].lo;
309 Htable[11].hi = V.hi ^ Htable[3].hi, Htable[11].lo = V.lo ^ Htable[3].lo;
310 Htable[12].hi = V.hi ^ Htable[4].hi, Htable[12].lo = V.lo ^ Htable[4].lo;
311 Htable[13].hi = V.hi ^ Htable[5].hi, Htable[13].lo = V.lo ^ Htable[5].lo;
312 Htable[14].hi = V.hi ^ Htable[6].hi, Htable[14].lo = V.lo ^ Htable[6].lo;
313 Htable[15].hi = V.hi ^ Htable[7].hi, Htable[15].lo = V.lo ^ Htable[7].lo;
317 * ARM assembler expects specific dword order in Htable.
330 V = Htable[j];
331 Htable[j].hi = V.lo;
332 Htable[j].lo = V.hi;
335 V = Htable[j];
336 Htable[j].hi = V.lo << 32 | V.lo >> 32;
337 Htable[j].lo = V.hi << 32 | V.hi >> 32;
351 static void gcm_gmult_4bit(u64 Xi[2], const u128 Htable[16])
367 Z.hi = Htable[nlo].hi;
368 Z.lo = Htable[nlo].lo;
379 Z.hi ^= Htable[nhi].hi;
380 Z.lo ^= Htable[nhi].lo;
397 Z.hi ^= Htable[nlo].hi;
398 Z.lo ^= Htable[nlo].lo;
431 static void gcm_ghash_4bit(u64 Xi[2], const u128 Htable[16],
452 Z.hi = Htable[nlo].hi;
453 Z.lo = Htable[nlo].lo;
464 Z.hi ^= Htable[nhi].hi;
465 Z.lo ^= Htable[nhi].lo;
483 Z.hi ^= Htable[nlo].hi;
484 Z.lo ^= Htable[nlo].lo;
493 u128 Hshr4[16]; /* Htable shifted right by 4 bits */
494 u8 Hshl4[16]; /* Htable shifted left by 4 bits */
536 Z.hi = Htable[cnt].hi;
537 Z.lo = Htable[cnt].lo;
550 Z.hi ^= Htable[nlo].hi;
551 Z.lo ^= Htable[nlo].lo;
568 Z.hi ^= Htable[nlo].hi;
569 Z.lo ^= Htable[nlo].lo;
576 Z.hi ^= Htable[nhi].hi;
577 Z.lo ^= Htable[nhi].lo;
605 void gcm_gmult_4bit(u64 Xi[2], const u128 Htable[16]);
606 void gcm_ghash_4bit(u64 Xi[2], const u128 Htable[16], const u8 *inp,
610 # define GCM_MUL(ctx,Xi) gcm_gmult_4bit(ctx->Xi.u,ctx->Htable)
612 # define GHASH(ctx,in,len) gcm_ghash_4bit((ctx)->Xi.u,(ctx)->Htable,in,len)
699 void gcm_init_clmul(u128 Htable[16], const u64 Xi[2]);
700 void gcm_gmult_clmul(u64 Xi[2], const u128 Htable[16]);
701 void gcm_ghash_clmul(u64 Xi[2], const u128 Htable[16], const u8 *inp,
709 void gcm_init_avx(u128 Htable[16], const u64 Xi[2]);
710 void gcm_gmult_avx(u64 Xi[2], const u128 Htable[16]);
711 void gcm_ghash_avx(u64 Xi[2], const u128 Htable[16], const u8 *inp,
717 void gcm_gmult_4bit_mmx(u64 Xi[2], const u128 Htable[16]);
718 void gcm_ghash_4bit_mmx(u64 Xi[2], const u128 Htable[16], const u8 *inp,
721 void gcm_gmult_4bit_x86(u64 Xi[2], const u128 Htable[16]);
722 void gcm_ghash_4bit_x86(u64 Xi[2], const u128 Htable[16], const u8 *inp,
734 void gcm_init_neon(u128 Htable[16], const u64 Xi[2]);
735 void gcm_gmult_neon(u64 Xi[2], const u128 Htable[16]);
736 void gcm_ghash_neon(u64 Xi[2], const u128 Htable[16], const u8 *inp,
738 void gcm_init_v8(u128 Htable[16], const u64 Xi[2]);
739 void gcm_gmult_v8(u64 Xi[2], const u128 Htable[16]);
740 void gcm_ghash_v8(u64 Xi[2], const u128 Htable[16], const u8 *inp,
748 void gcm_init_vis3(u128 Htable[16], const u64 Xi[2]);
749 void gcm_gmult_vis3(u64 Xi[2], const u128 Htable[16]);
750 void gcm_ghash_vis3(u64 Xi[2], const u128 Htable[16], const u8 *inp,
756 void gcm_init_p8(u128 Htable[16], const u64 Xi[2]);
757 void gcm_gmult_p8(u64 Xi[2], const u128 Htable[16]);
758 void gcm_ghash_p8(u64 Xi[2], const u128 Htable[16], const u8 *inp,
765 # define GCM_MUL(ctx,Xi) (*gcm_gmult_p)(ctx->Xi.u,ctx->Htable)
768 # define GHASH(ctx,in,len) (*gcm_ghash_p)(ctx->Xi.u,ctx->Htable,in,len)
802 gcm_init_8bit(ctx->Htable, ctx->H.u);
809 gcm_init_avx(ctx->Htable, ctx->H.u);
813 gcm_init_clmul(ctx->Htable, ctx->H.u);
820 gcm_init_4bit(ctx->Htable, ctx->H.u);
840 gcm_init_v8(ctx->Htable, ctx->H.u);
847 gcm_init_neon(ctx->Htable, ctx->H.u);
853 gcm_init_4bit(ctx->Htable, ctx->H.u);
863 gcm_init_vis3(ctx->Htable, ctx->H.u);
867 gcm_init_4bit(ctx->Htable, ctx->H.u);
873 gcm_init_p8(ctx->Htable, ctx->H.u);
877 gcm_init_4bit(ctx->Htable, ctx->H.u);
886 gcm_init_4bit(ctx->Htable, ctx->H.u);
902 void (*gcm_gmult_p) (u64 Xi[2], const u128 Htable[16]) = ctx->gmult;
982 void (*gcm_gmult_p) (u64 Xi[2], const u128 Htable[16]) = ctx->gmult;
984 void (*gcm_ghash_p) (u64 Xi[2], const u128 Htable[16],
1052 void (*gcm_gmult_p) (u64 Xi[2], const u128 Htable[16]) = ctx->gmult;
1054 void (*gcm_ghash_p) (u64 Xi[2], const u128 Htable[16],
1239 void (*gcm_gmult_p) (u64 Xi[2], const u128 Htable[16]) = ctx->gmult;
1241 void (*gcm_ghash_p) (u64 Xi[2], const u128 Htable[16],
1430 void (*gcm_gmult_p) (u64 Xi[2], const u128 Htable[16]) = ctx->gmult;
1432 void (*gcm_ghash_p) (u64 Xi[2], const u128 Htable[16],
1552 void (*gcm_gmult_p) (u64 Xi[2], const u128 Htable[16]) = ctx->gmult;
1554 void (*gcm_ghash_p) (u64 Xi[2], const u128 Htable[16],
1678 void (*gcm_gmult_p) (u64 Xi[2], const u128 Htable[16]) = ctx->gmult;
2355 void (*gcm_ghash_p) (u64 Xi[2], const u128 Htable[16],