Lines Matching refs:r31
60 stmw r31,-4(r1)
63 li r31,0xf
64 andc r9,r9,r31 ; for quadword-aligned stack data
71 addis r31,0,hi16(0xfffffc00)
72 ori r31,r31,lo16(0xfffffc00)
73 mtspr 256,r31 ; declare VRs in vrsave
79 li r31,0xf
80 and r31,r8,r31 ; r31: data%4
82 subf r31,r31,r11 ; r31: 4-(data%4)
83 slwi r31,r31,3 ; convert to bits for vsro
85 stw r31,-4(r9)
90 li r31,0x8
91 lvsl v0,0,r31
93 li r31,0xc
94 lvsl v1,0,r31
118 addis r31,0,hi16(L1307)
119 ori r31,r31,lo16(L1307)
132 addis r31,0,hi16(L1306)
133 ori r31,r31,lo16(L1306)
146 addis r31,0,hi16(L1305)
147 ori r31,r31,lo16(L1305)
160 addis r31,0,hi16(L1304)
161 ori r31,r31,lo16(L1304)
174 addis r31,0,hi16(L1303)
175 ori r31,r31,lo16(L1303)
188 addis r31,0,hi16(L1302)
189 ori r31,r31,lo16(L1302)
202 addis r31,0,hi16(L1301)
203 ori r31,r31,lo16(L1301)
214 addis r31,0,hi16(L1300)
215 ori r31,r31,lo16(L1300)
218 mtctr r31
293 lmw r31,-4(r1)
309 stmw r31,-4(r1)
312 li r31,0xf
313 andc r9,r9,r31 ; for quadword-aligned stack data
320 addis r31,0,hi16(0xffc00000)
321 ori r31,r31,lo16(0xffc00000)
322 mtspr 256,r31 ; declare VRs in vrsave
328 li r31,0xf
329 and r31,r8,r31 ; r31: data%4
331 subf r31,r31,r11 ; r31: 4-(data%4)
332 slwi r31,r31,3 ; convert to bits for vsro
334 stw r31,-4(r9)
339 li r31,0x8
340 lvsl v0,0,r31
342 li r31,0xc
343 lvsl v1,0,r31
367 addis r31,0,hi16(L2301)
368 ori r31,r31,lo16(L2301)
379 addis r31,0,hi16(L2300)
380 ori r31,r31,lo16(L2300)
383 mtctr r31
428 lmw r31,-4(r1)