Lines Matching refs:macro
31 %macro VP9_IDCT_COEFFS 2-3 0
77 %macro VP9_MULSUB_2W_2X 5 ; dst1, dst2/src, round, coefs1, coefs2
86 %macro VP9_MULSUB_2W_4X 7 ; dst1, dst2, coef1, coef2, rnd, tmp1/src, tmp2
93 %macro VP9_UNPACK_MULSUB_2W_4X 7-9 ; dst1, dst2, (src1, src2,) coef1, coef2, rnd, tmp1, tmp2
105 %macro VP9_UNPACK_MULSUB_2D_4X 6 ; dst1 [src1], dst2 [src2], dst3, dst4, mul1, mul2
114 %macro VP9_RND_SH_SUMSUB_BA 6 ; dst1 [src1], dst2 [src2], src3, src4, tmp, round
129 %macro VP9_STORE_2X 5-6 dstq ; reg1, reg2, tmp1, tmp2, zero, dst
142 %macro ZERO_BLOCK 4 ; mem, stride, nnzcpl, zero_reg
158 %macro VP9_IWHT4_1D 0
199 %macro VP9_IDCT4_1D_FINALIZE 0
205 %macro VP9_IDCT4_1D 0
214 %macro VP9_IDCT4_2x2_1D 0
223 %macro VP9_IDCT4_WRITEOUT 0
294 %macro VP9_IADST4_1D 0
327 %macro IADST4_FN 5
358 %macro VP9_IDCT8_1D_FINALIZE 0
367 %macro VP9_IDCT8_1D 0
384 %macro VP9_IDCT8_4x4_1D 0
406 %macro VP9_IDCT8_2x2_1D 0
425 %macro VP9_IDCT8_WRITEOUT 0
444 %macro VP9_IDCT_IDCT_8x8_ADD_XMM 1
535 %macro VP9_IADST8_1D 0 ; input/output=m0/1/2/3/8/9/10/11
575 %macro IADST8_FN 5
610 ; at the end of this macro, m7 is stored in stack_scratch
615 %macro VP9_IDCT16_1D_START 4 ; src, nnzc, stride, stack_scratch
774 %macro VP9_IDCT16_1D 2-3 16 ; src, pass, nnzc
855 %macro VP9_STORE_2XFULL 6-7 strideq; dc, tmp1, tmp2, tmp3, tmp4, zero, stride
872 %macro VP9_IDCT_IDCT_16x16_ADD_XMM 1
950 %macro VP9_IADST16_1D 2 ; src, pass
1139 %macro IADST16_FN 5
1179 %macro VP9_IDCT32_1D 2-3 32 ; src, pass, nnzc
1488 %macro %%STORE_2X2 7-8 1 ; src[1-4], tmp[1-2], zero, inc_dst_ptrs
1552 %macro VP9_IDCT_IDCT_32x32_ADD_XMM 1