Lines Matching refs:SHIFT_FRW_COL
51 #define SHIFT_FRW_COL BITS_FRW_ACC
54 //#define RND_FRW_COL (1 << (SHIFT_FRW_COL-1))
301 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"0 \n\t" \
305 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"4 \n\t" \
313 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"5 \n\t" \
315 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"7 \n\t" \
321 "psllw $"S(SHIFT_FRW_COL)"+1, %%"#mm"2 \n\t" \
329 "psllw $"S(SHIFT_FRW_COL)"+1, %%"#mm"3 \n\t" \
339 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"1 \n\t" \
347 "psllw $"S(SHIFT_FRW_COL)", %%"#mm"3 \n\t" \