Lines Matching refs:r0
32 .macro lowpass_8 r0, r1, r2, r3, d0, d1, narrow=1
40 vext.8 d2, \r0, \r1, #2
41 vext.8 d3, \r0, \r1, #3
43 vext.8 d4, \r0, \r1, #1
44 vext.8 d5, \r0, \r1, #4
46 vext.8 d30, \r0, \r1, #5
47 vaddl.u8 t0, \r0, d30
68 .macro lowpass_8_1 r0, r1, d0, narrow=1
74 vext.8 d2, \r0, \r1, #2
75 vext.8 d3, \r0, \r1, #3
77 vext.8 d4, \r0, \r1, #1
78 vext.8 d5, \r0, \r1, #4
80 vext.8 d30, \r0, \r1, #5
81 vaddl.u8 t0, \r0, d30
90 .macro lowpass_8.16 r0, r1, l0, h0, l1, h1, d
91 vext.16 q1, \r0, \r1, #2
92 vext.16 q0, \r0, \r1, #3
94 vext.16 q2, \r0, \r1, #1
96 vext.16 q3, \r0, \r1, #4
98 vext.16 \r1, \r0, \r1, #5
144 sub r0, r0, r3, lsl #4
146 add r0, r0, #8
158 vld1.8 {d2}, [r0,:64], r3
160 vld1.8 {d3}, [r0,:64]
162 sub r0, r0, r3
164 vst1.8 {d0}, [r0,:64], r3
165 vst1.8 {d16}, [r0,:64], r3
179 sub r0, r0, r2, lsl #4
182 add r0, r0, #8
198 vld1.8 {d2}, [r0,:64], r2
200 vld1.8 {d3}, [r0,:64]
202 sub r0, r0, r2
204 vst1.8 {d0}, [r0,:64], r2
205 vst1.8 {d1}, [r0,:64], r2
235 sub r0, r0, r2, lsl #4
236 add r0, r0, #8
268 vld1.8 {d9}, [r0,:64], r2
270 vld1.8 {d11}, [r0,:64], r2
272 vld1.8 {d13}, [r0,:64], r2
274 vld1.8 {d15}, [r0,:64], r2
276 vld1.8 {d23}, [r0,:64], r2
278 vld1.8 {d25}, [r0,:64], r2
280 vld1.8 {d27}, [r0,:64], r2
282 vld1.8 {d29}, [r0,:64], r2
284 sub r0, r0, r2, lsl #3
287 vst1.8 {d8}, [r0,:64], r2
288 vst1.8 {d10}, [r0,:64], r2
289 vst1.8 {d12}, [r0,:64], r2
290 vst1.8 {d14}, [r0,:64], r2
291 vst1.8 {d22}, [r0,:64], r2
292 vst1.8 {d24}, [r0,:64], r2
293 vst1.8 {d26}, [r0,:64], r2
294 vst1.8 {d28}, [r0,:64], r2
309 sub r0, r0, r3, lsl #4
311 add r0, r0, #8
357 vld1.8 {d16}, [r0,:64], r3
359 vld1.8 {d17}, [r0,:64], r3
361 vld1.8 {d16}, [r0,:64], r3
363 vld1.8 {d17}, [r0,:64], r3
365 vld1.8 {d16}, [r0,:64], r3
367 vld1.8 {d17}, [r0,:64], r3
369 vld1.8 {d16}, [r0,:64], r3
371 vld1.8 {d17}, [r0,:64], r3
373 sub r0, r0, r3, lsl #3
376 vst1.8 {d0}, [r0,:64], r3
377 vst1.8 {d1}, [r0,:64], r3
378 vst1.8 {d2}, [r0,:64], r3
379 vst1.8 {d3}, [r0,:64], r3
380 vst1.8 {d4}, [r0,:64], r3
381 vst1.8 {d5}, [r0,:64], r3
382 vst1.8 {d10}, [r0,:64], r3
383 vst1.8 {d11}, [r0,:64], r3
463 vld1.8 {d0}, [r0,:64], r2
465 vld1.8 {d1}, [r0,:64], r2
467 vld1.8 {d2}, [r0,:64], r2
469 vld1.8 {d3}, [r0,:64], r2
471 vld1.8 {d4}, [r0,:64], r2
473 vld1.8 {d5}, [r0,:64], r2
475 vld1.8 {d6}, [r0,:64], r2
477 vld1.8 {d7}, [r0,:64], r2
479 sub r0, r0, r2, lsl #3
482 vst1.8 {d12}, [r0,:64], r2
483 vst1.8 {d13}, [r0,:64], r2
484 vst1.8 {d14}, [r0,:64], r2
485 vst1.8 {d15}, [r0,:64], r2
486 vst1.8 {d8}, [r0,:64], r2
487 vst1.8 {d9}, [r0,:64], r2
488 vst1.8 {d10}, [r0,:64], r2
489 vst1.8 {d11}, [r0,:64], r2
513 vld1.8 {d16}, [r0,:64], r3
515 vld1.8 {d17}, [r0,:64], r3
517 vld1.8 {d18}, [r0,:64], r3
519 vld1.8 {d19}, [r0,:64], r3
521 vld1.8 {d20}, [r0,:64], r3
523 vld1.8 {d21}, [r0,:64], r3
525 vld1.8 {d22}, [r0,:64], r3
527 vld1.8 {d23}, [r0,:64], r3
529 sub r0, r0, r3, lsl #3
531 vst1.8 {d0}, [r0,:64], r3
532 vst1.8 {d1}, [r0,:64], r3
533 vst1.8 {d2}, [r0,:64], r3
534 vst1.8 {d3}, [r0,:64], r3
535 vst1.8 {d4}, [r0,:64], r3
536 vst1.8 {d5}, [r0,:64], r3
537 vst1.8 {d6}, [r0,:64], r3
538 vst1.8 {d7}, [r0,:64], r3
557 sub r0, r0, r2, lsl #4
558 add r0, r0, #8
574 sub r0, r0, r3, lsl #4
575 add r0, r0, #8
625 push {r0, r1, r11, lr}
630 T bic r0, r11, #15
631 T mov sp, r0
633 mov r0, sp
639 ldrd r0, r1, [r11], #8
651 push {r0, r1, r4, r10, r11, lr}
656 T bic r0, r11, #15
657 T mov sp, r0
661 mov r0, sp
665 mov r4, r0
666 ldrd r0, r1, [r11], #8
679 push {r0, r1, r11, lr}
696 push {r0, r1, r4, r10, r11, lr}
701 T bic r0, r11, #15
702 T mov sp, r0
707 mov r0, sp
710 mov r4, r0
711 ldrd r0, r1, [r11], #8
740 push {r0, r1, r4, r10, r11, lr}
752 push {r0, r1, r11, lr}
758 push {r0, r1, r4, r10, r11, lr}
765 push {r0, r1, r11, lr}
811 push {r0, r1, r4, r11, lr}
816 T bic r0, r11, #15
817 T mov sp, r0
819 mov r0, sp
824 ldrd r0, r1, [r11], #8
836 push {r0, r1, r4-r5, r9-r11, lr}
841 T bic r0, r11, #15
842 T mov sp, r0
845 mov r0, sp
848 mov r4, r0
849 ldrd r0, r1, [r11], #8
861 push {r0, r1, r4, r11, lr}
878 push {r0, r1, r4-r5, r9-r11, lr}
883 T bic r0, r11, #15
884 T mov sp, r0
887 mov r0, sp
891 mov r4, r0
892 ldrd r0, r1, [r11], #8
922 push {r0, r1, r4-r5, r9-r11, lr}
934 push {r0, r1, r4, r11, lr}
940 push {r0, r1, r4-r5, r9-r11, lr}
947 push {r0, r1, r4, r11, lr}