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  • only in /netgear-R7000-V1.0.7.12_1.2.5/ap/gpl/iserver/libav-0.8.8/libavcodec/ppc/

Lines Matching defs:s3

29 #define STEP8(s0, s1, s2, s3, s4, s5, s6, s7, vec_rnd) \
46 t0 = vec_sl(vec_add(s1, s3), vec_4); \
49 t0 = vec_add(t0, vec_sub(s5, s3)); \
53 t1 = vec_sub(t1, vec_sl(s3, vec_2)); \
56 t2 = vec_sl(vec_sub(s7, s3), vec_4); \
62 t3 = vec_sub(t3, vec_sl(s3, vec_3)); \
64 t3 = vec_sub(t3, vec_add(s3, s5)); \
69 s3 = vec_add(t7, t3); \
76 #define SHIFT_HOR8(s0, s1, s2, s3, s4, s5, s6, s7) \
81 s3 = vec_sra(s3, vec_3); \
88 #define SHIFT_VERT8(s0, s1, s2, s3, s4, s5, s6, s7) \
93 s3 = vec_sra(s3, vec_7); \
101 #define STEP4(s0, s1, s2, s3, vec_rnd) \
108 t3 = vec_sl(vec_sub(s3, s1), vec_1); \
111 t3 = vec_add(t3, vec_sl(s3, vec_3)); \
112 t3 = vec_add(t3, vec_sl(s3, vec_2)); \
116 s3 = vec_sub(t0, t2); \
119 #define SHIFT_HOR4(s0, s1, s2, s3) \
123 s3 = vec_sra(s3, vec_3);
125 #define SHIFT_VERT4(s0, s1, s2, s3) \
129 s3 = vec_sra(s3, vec_7);
136 vector signed int s0, s1, s2, s3, s4, s5, s6, s7;
160 s3 = vec_unpackl(src3);
173 STEP8(s0, s1, s2, s3, s4, s5, s6, s7, vec_4s);
174 SHIFT_HOR8(s0, s1, s2, s3, s4, s5, s6, s7);
180 src3 = vec_pack(sB, s3);
190 s3 = vec_unpackl(src3);
203 STEP8(s0, s1, s2, s3, s4, s5, s6, s7, vec_64);
204 SHIFT_VERT8(s0, s1, s2, s3, s4, s5, s6, s7);
210 src3 = vec_pack(sB, s3);
231 vector signed int s0, s1, s2, s3, s4, s5, s6, s7;
259 s3 = vec_unpackl(src3);
272 STEP8(s0, s1, s2, s3, s4, s5, s6, s7, vec_4s);
273 SHIFT_HOR8(s0, s1, s2, s3, s4, s5, s6, s7);
279 src3 = vec_pack(sB, s3);
289 s3 = vec_unpackh(src3);
294 STEP4(s0, s1, s2, s3, vec_64);
295 SHIFT_VERT4(s0, s1, s2, s3);
301 src3 = vec_pack(s3, sB);