Lines Matching refs:num
44 static int dwarf2regno(int num) { return num; }
46 bool validRegister(int num) const {
47 return num >= REGNO_X86_EAX && num <= REGNO_X86_EDI;
50 uint32_t getRegister(int num) const {
51 assert(validRegister(num));
52 return reg[num];
55 void setRegister(int num, uint32_t value) {
56 assert(validRegister(num));
57 reg[num] = value;
68 bool validFloatVectorRegister(int num) const { return false; }
70 void copyFloatVectorRegister(int num, uint32_t addr) {
110 static int dwarf2regno(int num) { return num; }
112 bool validRegister(int num) const {
113 return num >= REGNO_X86_64_RAX && num <= REGNO_X86_64_R15;
116 uint64_t getRegister(int num) const {
117 assert(validRegister(num));
118 return reg[num];
121 void setRegister(int num, uint64_t value) {
122 assert(validRegister(num));
123 reg[num] = value;
134 bool validFloatVectorRegister(int num) const { return false; }
136 void copyFloatVectorRegister(int num, uint64_t addr) {
186 static int dwarf2regno(int num) {
187 if (num >= DWARF_PPC32_R0 && num <= DWARF_PPC32_R31)
188 return REGNO_PPC32_R0 + (num - DWARF_PPC32_R0);
189 if (num >= DWARF_PPC32_F0 && num <= DWARF_PPC32_F31)
190 return REGNO_PPC32_F0 + (num - DWARF_PPC32_F0);
191 if (num >= DWARF_PPC32_V0 && num <= DWARF_PPC32_V31)
192 return REGNO_PPC32_V0 + (num - DWARF_PPC32_V0);
193 switch (num) {
209 bool validRegister(int num) const {
210 return (num >= 0 && num <= REGNO_PPC32_SRR0) ||
211 (num >= REGNO_PPC32_CTR && num <= REGNO_PPC32_SIGRETURN);
214 uint64_t getRegister(int num) const {
215 assert(validRegister(num));
216 switch (num) {
224 return reg[num];
228 void setRegister(int num, uint64_t value) {
229 assert(validRegister(num));
230 switch (num) {
241 reg[num] = value;
253 bool validFloatVectorRegister(int num) const {
254 return (num >= REGNO_PPC32_F0 && num <= REGNO_PPC32_F31) ||
255 (num >= REGNO_PPC32_V0 && num <= REGNO_PPC32_V31);
258 void copyFloatVectorRegister(int num, uint64_t addr_) {
260 if (num >= REGNO_PPC32_F0 && num <= REGNO_PPC32_F31)
261 memcpy(fpreg + (num - REGNO_PPC32_F0), addr, sizeof(fpreg[0]));
263 memcpy(vecreg + (num - REGNO_PPC32_V0), addr, sizeof(vecreg[0]));
308 static int dwarf2regno(int num) {
309 if (num >= DWARF_AARCH64_X0 && num <= DWARF_AARCH64_X30)
310 return REGNO_AARCH64_X0 + (num - DWARF_AARCH64_X0);
311 if (num == DWARF_AARCH64_SP)
313 if (num >= DWARF_AARCH64_V0 && num <= DWARF_AARCH64_V31)
314 return REGNO_AARCH64_V0 + (num - DWARF_AARCH64_V0);
315 if (num == DWARF_AARCH64_SIGRETURN)
320 bool validRegister(int num) const {
321 return (num >= DWARF_AARCH64_X0 && num <= DWARF_AARCH64_SP) ||
322 num == DWARF_AARCH64_SIGRETURN;
325 uint64_t getRegister(int num) const {
326 assert(validRegister(num));
327 if (num == REGNO_AARCH64_SIGRETURN)
329 return reg[num];
332 void setRegister(int num, uint64_t value) {
333 assert(validRegister(num));
334 if (num == REGNO_AARCH64_SIGRETURN)
337 reg[num] = value;
348 bool validFloatVectorRegister(int num) const {
349 return (num >= REGNO_AARCH64_V0 && num <= REGNO_AARCH64_V31);
352 void copyFloatVectorRegister(int num, uint64_t addr_) {
354 memcpy(vecreg + (num - REGNO_AARCH64_V0), addr, 16);
400 static int dwarf2regno(int num) {
401 if (num >= DWARF_ARM32_R0 && num <= DWARF_ARM32_R15)
402 return REGNO_ARM32_R0 + (num - DWARF_ARM32_R0);
403 if (num == DWARF_ARM32_SPSR)
405 if (num >= DWARF_ARM32_D0 && num <= DWARF_ARM32_D31)
406 return REGNO_ARM32_D0 + (num - DWARF_ARM32_D0);
407 if (num >= DWARF_ARM32_S0 && num <= DWARF_ARM32_S31)
408 return REGNO_ARM32_S0 + (num - DWARF_ARM32_S0);
412 bool validRegister(int num) const {
413 return num >= 0 && num <= REGNO_ARM32_SPSR;
416 uint64_t getRegister(int num) const {
417 assert(validRegister(num));
418 return reg[num];
421 void setRegister(int num, uint64_t value) {
422 assert(validRegister(num));
423 reg[num] = value;
434 bool validFloatVectorRegister(int num) const {
435 return (num >= REGNO_ARM32_D0 && num <= REGNO_ARM32_S31);
438 void copyFloatVectorRegister(int num, uint64_t addr_) {
439 assert(validFloatVectorRegister(num));
441 if (num >= REGNO_ARM32_S0 && num <= REGNO_ARM32_S31) {
458 int dnum = (num - REGNO_ARM32_S0) / 2;
459 int part = (num - REGNO_ARM32_S0) % 2;
466 if (num <= REGNO_ARM32_D15) {
483 memcpy(fpreg + (num - REGNO_ARM32_D0), addr, sizeof(fpreg[0]));
524 static int dwarf2regno(int num) {
525 if (num >= DWARF_VAX_R0 && num <= DWARF_VAX_R15)
526 return REGNO_VAX_R0 + (num - DWARF_VAX_R0);
527 if (num == DWARF_VAX_PSW)
532 bool validRegister(int num) const {
533 return num >= 0 && num <= LAST_RESTORE_REG;
536 uint64_t getRegister(int num) const {
537 assert(validRegister(num));
538 return reg[num];
541 void setRegister(int num, uint64_t value) {
542 assert(validRegister(num));
543 reg[num] = value;
554 bool validFloatVectorRegister(int num) const {
558 void copyFloatVectorRegister(int num, uint64_t addr_) {
599 static int dwarf2regno(int num) {
600 if (num >= DWARF_M68K_A0 && num <= DWARF_M68K_A7)
601 return REGNO_M68K_A0 + (num - DWARF_M68K_A0);
602 if (num >= DWARF_M68K_D0 && num <= DWARF_M68K_D7)
603 return REGNO_M68K_D0 + (num - DWARF_M68K_D0);
604 if (num >= DWARF_M68K_FP0 && num <= DWARF_M68K_FP7)
605 return REGNO_M68K_FP0 + (num - DWARF_M68K_FP0);
606 if (num == DWARF_M68K_PC || num == DWARF_M68K_ALT_PC)
611 bool validRegister(int num) const {
612 return num >= 0 && num <= REGNO_M68K_PC;
615 uint64_t getRegister(int num) const {
616 assert(validRegister(num));
617 return reg[num];
620 void setRegister(int num, uint64_t value) {
621 assert(validRegister(num));
622 reg[num] = value;
633 bool validFloatVectorRegister(int num) const {
634 return num >= REGNO_M68K_FP0 && num <= REGNO_M68K_FP7;
637 void copyFloatVectorRegister(int num, uint64_t addr_) {
638 assert(validFloatVectorRegister(num));
640 memcpy(fpreg + (num - REGNO_M68K_FP0), addr, sizeof(fpreg[0]));
684 static int dwarf2regno(int num) {
685 if (num >= DWARF_SH3_R0 && num <= DWARF_SH3_R15)
686 return REGNO_SH3_R0 + (num - DWARF_SH3_R0);
687 switch (num) {
705 bool validRegister(int num) const {
706 return (num >= 0 && num <= REGNO_SH3_GBR) ||
707 (num >= REGNO_SH3_MACH && num <= REGNO_SH3_SR);
710 uint64_t getRegister(int num) const {
711 assert(validRegister(num));
712 return reg[num];
715 void setRegister(int num, uint64_t value) {
716 assert(validRegister(num));
717 reg[num] = value;
728 bool validFloatVectorRegister(int num) const { return false; }
730 void copyFloatVectorRegister(int num, uint64_t addr_) {}
762 static int dwarf2regno(int num) {
763 if (num >= DWARF_SPARC64_R0 && num <= DWARF_SPARC64_R31)
764 return REGNO_SPARC64_R0 + (num - DWARF_SPARC64_R0);
765 if (num == DWARF_SPARC64_PC)
770 bool validRegister(int num) const {
771 return num >= 0 && num <= REGNO_SPARC64_PC;
774 uint64_t getRegister(int num) const {
775 assert(validRegister(num));
776 return reg[num];
779 void setRegister(int num, uint64_t value) {
780 assert(validRegister(num));
781 reg[num] = value;
792 bool validFloatVectorRegister(int num) const { return false; }
794 void copyFloatVectorRegister(int num, uint64_t addr_) {}
826 static int dwarf2regno(int num) {
827 if (num >= DWARF_SPARC_R0 && num <= DWARF_SPARC_R31)
828 return REGNO_SPARC_R0 + (num - DWARF_SPARC_R0);
829 if (num == DWARF_SPARC_PC)
834 bool validRegister(int num) const {
835 return num >= 0 && num <= REGNO_SPARC_PC;
838 uint64_t getRegister(int num) const {
839 assert(validRegister(num));
840 return reg[num];
843 void setRegister(int num, uint64_t value) {
844 assert(validRegister(num));
845 reg[num] = value;
856 bool validFloatVectorRegister(int num) const { return false; }
858 void copyFloatVectorRegister(int num, uint64_t addr_) {}
893 static int dwarf2regno(int num) { return num; }
895 bool validRegister(int num) const {
896 return (num >= 0 && num <= REGNO_ALPHA_PC) ||
897 num == REGNO_ALPHA_SIGRETURN;
900 uint64_t getRegister(int num) const {
901 assert(validRegister(num));
902 if (num == REGNO_ALPHA_SIGRETURN)
905 return reg[num];
908 void setRegister(int num, uint64_t value) {
909 assert(validRegister(num));
910 if (num == REGNO_ALPHA_SIGRETURN)
913 reg[num] = value;
924 bool validFloatVectorRegister(int num) const {
925 return num >= REGNO_ALPHA_F0 && num <= REGNO_ALPHA_F30;
928 void copyFloatVectorRegister(int num, uint64_t addr_) {
929 assert(validFloatVectorRegister(num));
931 memcpy(fpreg + (num - REGNO_ALPHA_F0), addr, sizeof(fpreg[0]));
970 static int dwarf2regno(int num) {
971 if (num >= DWARF_HPPA_R1 && num <= DWARF_HPPA_R31)
972 return REGNO_HPPA_R1 + (num - DWARF_HPPA_R1);
973 if (num >= DWARF_HPPA_FR4L && num <= DWARF_HPPA_FR31H)
974 return REGNO_HPPA_FR4L + (num - DWARF_HPPA_FR31H);
975 if (num == DWARF_HPPA_SIGRETURN)
980 bool validRegister(int num) const {
981 return (num >= REGNO_HPPA_PC && num <= REGNO_HPPA_R31) ||
982 num == REGNO_HPPA_SIGRETURN;
985 uint64_t getRegister(int num) const {
986 assert(validRegister(num));
987 if (num == REGNO_HPPA_SIGRETURN)
990 return reg[num];
993 void setRegister(int num, uint64_t value) {
994 assert(validRegister(num));
995 if (num == REGNO_HPPA_SIGRETURN)
998 reg[num] = value;
1009 bool validFloatVectorRegister(int num) const {
1010 return num >= REGNO_HPPA_FR4L && num <= REGNO_HPPA_FR31H;
1013 void copyFloatVectorRegister(int num, uint64_t addr_) {
1014 assert(validFloatVectorRegister(num));
1016 memcpy(fpreg + (num - REGNO_HPPA_FR4L), addr, sizeof(fpreg[0]));
1061 static int dwarf2regno(int num) {
1062 if (num >= DWARF_MIPS_R1 && num <= DWARF_MIPS_R31)
1063 return REGNO_MIPS_R1 + (num - DWARF_MIPS_R1);
1064 if (num >= DWARF_MIPS_F0 && num <= DWARF_MIPS_F31)
1065 return REGNO_MIPS_F0 + (num - DWARF_MIPS_F0);
1066 if (num >= DWARF_MIPS_MDHI && num <= DWARF_MIPS_SIGRETURN)
1067 return REGNO_MIPS_MDHI + (num - DWARF_MIPS_MDHI);
1071 bool validRegister(int num) const {
1072 return (num >= REGNO_MIPS_PC && num <= REGNO_MIPS_R31) ||
1073 (num >= REGNO_MIPS_MDHI && num <= REGNO_MIPS_SIGRETURN);
1076 uint64_t getRegister(int num) const {
1077 assert(validRegister(num));
1078 if (num >= REGNO_MIPS_MDHI && num <= REGNO_MIPS_SIGRETURN)
1079 return other_reg[num - REGNO_MIPS_MDHI];
1080 return reg[num];
1083 void setRegister(int num, uint64_t value) {
1084 assert(validRegister(num));
1085 if (num >= REGNO_MIPS_MDHI && num <= REGNO_MIPS_SIGRETURN)
1086 other_reg[num - REGNO_MIPS_MDHI] = value;
1088 reg[num] = value;
1099 bool validFloatVectorRegister(int num) const {
1100 return num >= REGNO_MIPS_F0 && num <= REGNO_MIPS_F31;
1103 void copyFloatVectorRegister(int num, uint64_t addr_) {
1104 assert(validFloatVectorRegister(num));
1106 memcpy(fpreg + (num - REGNO_MIPS_F0), addr, sizeof(fpreg[0]));
1151 static int dwarf2regno(int num) {
1152 if (num >= DWARF_MIPS64_R1 && num <= DWARF_MIPS64_R31)
1153 return REGNO_MIPS64_R1 + (num - DWARF_MIPS64_R1);
1154 if (num >= DWARF_MIPS64_F0 && num <= DWARF_MIPS64_F31)
1155 return REGNO_MIPS64_F0 + (num - DWARF_MIPS64_F0);
1156 if (num >= DWARF_MIPS64_MDHI && num <= DWARF_MIPS64_SIGRETURN)
1157 return REGNO_MIPS64_MDHI + (num - DWARF_MIPS64_MDHI);
1161 bool validRegister(int num) const {
1162 return (num >= REGNO_MIPS64_PC && num <= REGNO_MIPS64_R31) ||
1163 (num >= REGNO_MIPS64_MDHI && num <= REGNO_MIPS64_SIGRETURN);
1166 uint64_t getRegister(int num) const {
1167 assert(validRegister(num));
1168 if (num >= REGNO_MIPS64_MDHI && num <= REGNO_MIPS64_SIGRETURN)
1169 return other_reg[num - REGNO_MIPS64_MDHI];
1170 return reg[num];
1173 void setRegister(int num, uint64_t value) {
1174 assert(validRegister(num));
1175 if (num >= REGNO_MIPS64_MDHI && num <= REGNO_MIPS64_SIGRETURN)
1176 other_reg[num - REGNO_MIPS64_MDHI] = value;
1178 reg[num] = value;
1189 bool validFloatVectorRegister(int num) const {
1190 return num >= REGNO_MIPS64_F0 && num <= REGNO_MIPS64_F31;
1193 void copyFloatVectorRegister(int num, uint64_t addr_) {
1194 assert(validFloatVectorRegister(num));
1196 memcpy(fpreg + (num - REGNO_MIPS64_F0), addr, sizeof(fpreg[0]));
1232 static int dwarf2regno(int num) {
1233 if (num >= DWARF_OR1K_R0 && num <= DWARF_OR1K_R31)
1234 return REGNO_OR1K_R0 + (num - DWARF_OR1K_R0);
1235 if (num == DWARF_OR1K_FPCSR)
1240 bool validRegister(int num) const {
1241 return num >= 0 && num <= LAST_RESTORE_REG;
1244 uint64_t getRegister(int num) const {
1245 assert(validRegister(num));
1246 return reg[num];
1249 void setRegister(int num, uint64_t value) {
1250 assert(validRegister(num));
1251 reg[num] = value;
1262 bool validFloatVectorRegister(int num) const {
1266 void copyFloatVectorRegister(int num, uint64_t addr_) {