Lines Matching refs:sys_info

644 	u32 vid_7bit = sumo_convert_vid2_to_vid7(rdev, &pi->sys_info.vid_mapping_table, vid);
1017 value |= LT((pi->thermal_auto_throttling + 49 - pi->sys_info.htc_hyst_lmt) * 8);
1195 if (pi->sys_info.nb_dpm_enable) {
1317 u32 vid_7bit = sumo_convert_vid2_to_vid7(rdev, &pi->sys_info.vid_mapping_table, vid_2bit);
1350 pi->boot_pl.sclk = pi->sys_info.bootup_sclk;
1351 pi->boot_pl.vddc_index = pi->sys_info.bootup_nb_voltage_index;
1392 for (i = 0; i < pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries; i++) {
1393 if (pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency >= lower_limit)
1394 return pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency;
1397 if (i == pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries)
1408 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */
1463 if ((rps->vclk == pi->sys_info.uvd_clock_table_entries[i].vclk) &&
1464 (rps->dclk == pi->sys_info.uvd_clock_table_entries[i].dclk))
1499 pi->sys_info.uvd_clock_table_entries[high_index].vclk_did;
1501 pi->sys_info.uvd_clock_table_entries[high_index].dclk_did;
1503 pi->sys_info.uvd_clock_table_entries[low_index].vclk_did;
1505 pi->sys_info.uvd_clock_table_entries[low_index].dclk_did;
1547 u32 min_sclk = pi->sys_info.min_sclk; /* XXX check against disp reqs */
1548 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */
1603 if (pi->sys_info.nb_dpm_enable) {
1613 (pi->sys_info.uma_channel_number == 1)));
1848 return ((pi->sys_info.dentist_vco_freq * 100) + (divider - 1)) / divider;
1870 pi->sys_info.bootup_sclk = le32_to_cpu(igp_info->info_7.ulBootUpEngineClock);
1871 pi->sys_info.min_sclk = le32_to_cpu(igp_info->info_7.ulMinEngineClock);
1872 pi->sys_info.bootup_uma_clk = le32_to_cpu(igp_info->info_7.ulBootUpUMAClock);
1873 pi->sys_info.dentist_vco_freq = le32_to_cpu(igp_info->info_7.ulDentistVCOFreq);
1874 pi->sys_info.bootup_nb_voltage_index =
1877 pi->sys_info.htc_tmp_lmt = 203;
1879 pi->sys_info.htc_tmp_lmt = igp_info->info_7.ucHtcTmpLmt;
1881 pi->sys_info.htc_hyst_lmt = 5;
1883 pi->sys_info.htc_hyst_lmt = igp_info->info_7.ucHtcHystLmt;
1884 if (pi->sys_info.htc_tmp_lmt <= pi->sys_info.htc_hyst_lmt) {
1889 pi->sys_info.nb_dpm_enable = igp_info->info_7.ucNBDPMEnable;
1891 pi->sys_info.nb_dpm_enable = 0;
1894 pi->sys_info.nbp_mclk[i] = le32_to_cpu(igp_info->info_7.ulNbpStateMemclkFreq[i]);
1895 pi->sys_info.nbp_nclk[i] = le32_to_cpu(igp_info->info_7.ulNbpStateNClkFreq[i]);
1898 pi->sys_info.nbp_voltage_index[0] = le16_to_cpu(igp_info->info_7.usNBP0Voltage);
1899 pi->sys_info.nbp_voltage_index[1] = le16_to_cpu(igp_info->info_7.usNBP1Voltage);
1900 pi->sys_info.nbp_voltage_index[2] = le16_to_cpu(igp_info->info_7.usNBP2Voltage);
1901 pi->sys_info.nbp_voltage_index[3] = le16_to_cpu(igp_info->info_7.usNBP3Voltage);
1903 if (!pi->sys_info.nb_dpm_enable) {
1905 pi->sys_info.nbp_mclk[i] = pi->sys_info.nbp_mclk[0];
1906 pi->sys_info.nbp_nclk[i] = pi->sys_info.nbp_nclk[0];
1907 pi->sys_info.nbp_voltage_index[i] = pi->sys_info.nbp_voltage_index[0];
1911 pi->sys_info.uma_channel_number = igp_info->info_7.ucUMAChannelNumber;
1914 &pi->sys_info.sclk_voltage_mapping_table,
1916 sumo_construct_vid_mapping_table(rdev, &pi->sys_info.vid_mapping_table,
1919 pi->sys_info.uvd_clock_table_entries[0].vclk_did =
1921 pi->sys_info.uvd_clock_table_entries[1].vclk_did =
1923 pi->sys_info.uvd_clock_table_entries[2].vclk_did =
1925 pi->sys_info.uvd_clock_table_entries[3].vclk_did =
1928 pi->sys_info.uvd_clock_table_entries[0].dclk_did =
1930 pi->sys_info.uvd_clock_table_entries[1].dclk_did =
1932 pi->sys_info.uvd_clock_table_entries[2].dclk_did =
1934 pi->sys_info.uvd_clock_table_entries[3].dclk_did =
1938 pi->sys_info.uvd_clock_table_entries[i].vclk =
1940 pi->sys_info.uvd_clock_table_entries[i].vclk_did);
1941 pi->sys_info.uvd_clock_table_entries[i].dclk =
1943 pi->sys_info.uvd_clock_table_entries[i].dclk_did);
2010 pi->thermal_auto_throttling = pi->sys_info.htc_tmp_lmt;
2080 return pi->sys_info.bootup_uma_clk;
2112 return pi->sys_info.bootup_uma_clk;