drm/radeon/radeon_si.c

3883 	/* stop the rlc */
4067 	/* halt the rlc, disable cp internal ints */
5228 static void si_update_rlc(struct radeon_device *rdev, u32 rlc)
5233 	if (tmp != rlc)
5234 		WREG32(RLC_CNTL, rlc);
5290 	WREG32(RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8);
5296 	WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);
5696 	if (rdev->rlc.cs_data == NULL)
5704 	for (sect = rdev->rlc.cs_data; sect->section != NULL; ++sect) {
5728 	if (rdev->rlc.cs_data == NULL)
5740 	for (sect = rdev->rlc.cs_data; sect->section != NULL; ++sect) {
5792 			WREG32(RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8);
5793 			WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);
5798 		WREG32(RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8);
5799 		WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);
5999 	/* init rlc */
6656 	/* allocate rlc buffers */
6658 		rdev->rlc.reg_list = verde_rlc_save_restore_register_list;
6659 		rdev->rlc.reg_list_size =
6662 	rdev->rlc.cs_data = si_cs_data;
6665 		DRM_ERROR("Failed to init rlc BOs!\n");