drm/radeon/radeon_rs780_dpm.c

88 					     default_state->sclk_low, false, &dividers);
415 	if (current_state->sclk_low == current_state->sclk_high)
441 	    (new_state->sclk_low == old_state->sclk_low))
445 					     new_state->sclk_low, false, &min_dividers);
488 	    (new_state->sclk_low == old_state->sclk_low))
506 	    (new_state->sclk_low == old_state->sclk_low))
509 	if (new_state->sclk_high == new_state->sclk_low)
762 	ps->sclk_low = sclk;
788 		ps->sclk_low = rdev->clock.default_sclk;
953 	       ps->sclk_low, ps->min_voltage);
975 		return requested_state->sclk_low;
1004 	if (sclk < (ps->sclk_low + 500))
1006 			   ps->sclk_low, ps->min_voltage);
1059 						     ps->sclk_low, false, &dividers);
1071 		if (ps->sclk_high != ps->sclk_low) {