Lines Matching defs:new_ps
3513 struct radeon_ps *new_ps,
3516 struct ni_ps *new_state = ni_get_ps(new_ps);
3519 if ((new_ps->vclk == old_ps->vclk) &&
3520 (new_ps->dclk == old_ps->dclk))
3527 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk);
3531 struct radeon_ps *new_ps,
3534 struct ni_ps *new_state = ni_get_ps(new_ps);
3537 if ((new_ps->vclk == old_ps->vclk) &&
3538 (new_ps->dclk == old_ps->dclk))
3545 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk);
3568 struct ni_ps *new_ps = ni_get_ps(rps);
3573 ni_pi->current_ps = *new_ps;
3580 struct ni_ps *new_ps = ni_get_ps(rps);
3585 ni_pi->requested_ps = *new_ps;
3747 struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps;
3756 ret = ni_populate_smc_tdp_limits(rdev, new_ps);
3773 struct radeon_ps *new_ps = &requested_ps;
3775 ni_update_requested_ps(rdev, new_ps);
3785 struct radeon_ps *new_ps = &eg_pi->requested_rps;
3794 ni_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps);
3795 ret = ni_enable_power_containment(rdev, new_ps, false);
3800 ret = ni_enable_smc_cac(rdev, new_ps, false);
3811 btc_notify_uvd_to_smc(rdev, new_ps);
3812 ret = ni_upload_sw_state(rdev, new_ps);
3818 ret = ni_upload_mc_reg_table(rdev, new_ps);
3824 ret = ni_program_memory_timing_parameters(rdev, new_ps);
3839 ni_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps);
3840 ret = ni_enable_smc_cac(rdev, new_ps, true);
3845 ret = ni_enable_power_containment(rdev, new_ps, true);
3864 struct radeon_ps *new_ps = &eg_pi->requested_rps;
3866 ni_update_current_ps(rdev, new_ps);