Lines Matching defs:orig

5845 	u32 data, orig;
5847 orig = data = RREG32(RLC_CNTL);
5864 return orig;
6020 u32 data, orig, tmp, tmp2;
6022 orig = data = RREG32(RLC_CGCG_CGLS_CTRL);
6049 if (orig != data)
6056 u32 data, orig, tmp = 0;
6061 orig = data = RREG32(CP_MEM_SLP_CNTL);
6063 if (orig != data)
6068 orig = data = RREG32(RLC_CGTT_MGCG_OVERRIDE);
6071 if (orig != data)
6085 orig = data = RREG32(CGTS_SM_CTRL_REG);
6096 if (orig != data)
6100 orig = data = RREG32(RLC_CGTT_MGCG_OVERRIDE);
6102 if (orig != data)
6117 orig = data = RREG32(CGTS_SM_CTRL_REG);
6119 if (orig != data)
6151 u32 orig, data;
6154 orig = data = RREG32(mc_cg_registers[i]);
6159 if (data != orig)
6168 u32 orig, data;
6171 orig = data = RREG32(mc_cg_registers[i]);
6176 if (data != orig)
6184 u32 orig, data;
6190 orig = data = RREG32(SDMA0_CLK_CTRL + SDMA0_REGISTER_OFFSET);
6192 if (data != orig)
6195 orig = data = RREG32(SDMA0_CLK_CTRL + SDMA1_REGISTER_OFFSET);
6197 if (data != orig)
6205 u32 orig, data;
6208 orig = data = RREG32(SDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET);
6210 if (orig != data)
6213 orig = data = RREG32(SDMA0_POWER_CNTL + SDMA1_REGISTER_OFFSET);
6215 if (orig != data)
6218 orig = data = RREG32(SDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET);
6220 if (orig != data)
6223 orig = data = RREG32(SDMA0_POWER_CNTL + SDMA1_REGISTER_OFFSET);
6225 if (orig != data)
6233 u32 orig, data;
6240 orig = data = RREG32(UVD_CGC_CTRL);
6242 if (orig != data)
6249 orig = data = RREG32(UVD_CGC_CTRL);
6251 if (orig != data)
6259 u32 orig, data;
6261 orig = data = RREG32_PCIE_PORT(PCIE_CNTL2);
6270 if (orig != data)
6277 u32 orig, data;
6279 orig = data = RREG32(HDP_HOST_PATH_CNTL);
6286 if (orig != data)
6293 u32 orig, data;
6295 orig = data = RREG32(HDP_MEM_POWER_LS);
6302 if (orig != data)
6383 u32 data, orig;
6385 orig = data = RREG32(RLC_PG_CNTL);
6390 if (orig != data)
6397 u32 data, orig;
6399 orig = data = RREG32(RLC_PG_CNTL);
6404 if (orig != data)
6410 u32 data, orig;
6412 orig = data = RREG32(RLC_PG_CNTL);
6417 if (orig != data)
6423 u32 data, orig;
6425 orig = data = RREG32(RLC_PG_CNTL);
6430 if (orig != data)
6525 u32 data, orig;
6528 orig = data = RREG32(RLC_PG_CNTL);
6530 if (orig != data)
6533 orig = data = RREG32(RLC_AUTO_PG_CTRL);
6535 if (orig != data)
6538 orig = data = RREG32(RLC_PG_CNTL);
6540 if (orig != data)
6543 orig = data = RREG32(RLC_AUTO_PG_CTRL);
6545 if (orig != data)
6611 u32 data, orig;
6613 orig = data = RREG32(RLC_PG_CNTL);
6618 if (orig != data)
6625 u32 data, orig;
6627 orig = data = RREG32(RLC_PG_CNTL);
6632 if (orig != data)
6641 u32 data, orig;
6660 orig = data = RREG32(RLC_PG_CNTL);
6662 if (orig != data)
9753 u32 data, orig;
9767 orig = data = RREG32_PCIE_PORT(PCIE_LC_N_FTS_CNTL);
9770 if (orig != data)
9773 orig = data = RREG32_PCIE_PORT(PCIE_LC_CNTL3);
9775 if (orig != data)
9778 orig = data = RREG32_PCIE_PORT(PCIE_P_CNTL);
9780 if (orig != data)
9783 orig = data = RREG32_PCIE_PORT(PCIE_LC_CNTL);
9792 if (orig != data)
9798 orig = data = RREG32_PCIE_PORT(PB0_PIF_PWRDOWN_0);
9801 if (orig != data)
9804 orig = data = RREG32_PCIE_PORT(PB0_PIF_PWRDOWN_1);
9807 if (orig != data)
9810 orig = data = RREG32_PCIE_PORT(PB1_PIF_PWRDOWN_0);
9813 if (orig != data)
9816 orig = data = RREG32_PCIE_PORT(PB1_PIF_PWRDOWN_1);
9819 if (orig != data)
9822 orig = data = RREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL);
9825 if (orig != data)
9842 orig = data = RREG32_PCIE_PORT(PCIE_LC_CNTL2);
9844 if (orig != data)
9847 orig = data = RREG32_SMC(THM_CLK_CNTL);
9850 if (orig != data)
9853 orig = data = RREG32_SMC(MISC_CLK_CTRL);
9856 if (orig != data)
9859 orig = data = RREG32_SMC(CG_CLKPIN_CNTL);
9861 if (orig != data)
9864 orig = data = RREG32_SMC(CG_CLKPIN_CNTL_2);
9866 if (orig != data)
9869 orig = data = RREG32_SMC(MPLL_BYPASSCLK_SEL);
9872 if (orig != data)
9877 if (orig != data)
9881 orig = data = RREG32_PCIE_PORT(PCIE_CNTL2);
9883 if (orig != data)
9891 orig = data = RREG32_PCIE_PORT(PCIE_LC_CNTL);
9893 if (orig != data)