drm/radeon/radeon_btc_dpm.c

2130 		if (ps->medium.mclk > max_limits->mclk)
2131 			ps->medium.mclk = max_limits->mclk;
2132 		if (ps->medium.sclk > max_limits->sclk)
2133 			ps->medium.sclk = max_limits->sclk;
2134 		if (ps->medium.vddc > max_limits->vddc)
2135 			ps->medium.vddc = max_limits->vddc;
2136 		if (ps->medium.vddci > max_limits->vddci)
2137 			ps->medium.vddci = max_limits->vddci;
2172 	/* adjusted medium, high states */
2173 	if (ps->medium.sclk < ps->low.sclk)
2174 		ps->medium.sclk = ps->low.sclk;
2175 	if (ps->medium.vddc < ps->low.vddc)
2176 		ps->medium.vddc = ps->low.vddc;
2177 	if (ps->high.sclk < ps->medium.sclk)
2178 		ps->high.sclk = ps->medium.sclk;
2179 	if (ps->high.vddc < ps->medium.vddc)
2180 		ps->high.vddc = ps->medium.vddc;
2184 		if (mclk < ps->medium.mclk)
2185 			mclk = ps->medium.mclk;
2190 		ps->medium.mclk = mclk;
2191 		ps->medium.vddci = vddci;
2195 		if (ps->medium.mclk < ps->low.mclk)
2196 			ps->medium.mclk = ps->low.mclk;
2197 		if (ps->medium.vddci < ps->low.vddci)
2198 			ps->medium.vddci = ps->low.vddci;
2199 		if (ps->high.mclk < ps->medium.mclk)
2200 			ps->high.mclk = ps->medium.mclk;
2201 		if (ps->high.vddci < ps->medium.vddci)
2202 			ps->high.vddci = ps->medium.vddci;
2206 				  &ps->medium.sclk, &ps->medium.mclk);
2211 	btc_adjust_clock_combinations(rdev, max_limits, &ps->medium);
2224 					   ps->medium.sclk, max_limits->vddc, &ps->medium.vddc);
2226 					   ps->medium.mclk, max_limits->vddci, &ps->medium.vddci);
2228 					   ps->medium.mclk, max_limits->vddc, &ps->medium.vddc);
2230 					   rdev->clock.current_dispclk, max_limits->vddc, &ps->medium.vddc);
2244 				      &ps->medium.vddc, &ps->medium.vddci);
2249 	    (ps->medium.vddc <= rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc) &&
2257 	if (ps->medium.vddc < rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2)
2258 		ps->medium.flags &= ~ATOM_PPLIB_R600_FLAGS_PCIEGEN2;
2758 			pl = &ps->medium;
2784 			pl = &ps->medium;
2807 			pl = &ps->medium;