i915/display/intel_hdmi.c

272 				  const struct intel_crtc_state *pipe_config)
346 				  const struct intel_crtc_state *pipe_config)
349 	enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe;
426 				  const struct intel_crtc_state *pipe_config)
429 	enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe;
499 				  const struct intel_crtc_state *pipe_config)
502 	enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe;
569 				  const struct intel_crtc_state *pipe_config)
572 	u32 val = I915_READ(HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder));
1800 				  struct intel_crtc_state *pipe_config)
1808 	pipe_config->output_types |= BIT(INTEL_OUTPUT_HDMI);
1823 		pipe_config->has_hdmi_sink = true;
1825 	pipe_config->infoframes.enable |=
1826 		intel_hdmi_infoframes_enabled(encoder, pipe_config);
1828 	if (pipe_config->infoframes.enable)
1829 		pipe_config->has_infoframe = true;
1832 		pipe_config->has_audio = true;
1836 		pipe_config->limited_color_range = true;
1838 	pipe_config->hw.adjusted_mode.flags |= flags;
1841 		dotclock = pipe_config->port_clock * 2 / 3;
1843 		dotclock = pipe_config->port_clock;
1845 	if (pipe_config->pixel_multiplier)
1846 		dotclock /= pipe_config->pixel_multiplier;
1848 	pipe_config->hw.adjusted_mode.crtc_clock = dotclock;
1850 	pipe_config->lane_count = 4;
1852 	intel_hdmi_read_gcp_infoframe(encoder, pipe_config);
1854 	intel_read_infoframe(encoder, pipe_config,
1856 			     &pipe_config->infoframes.avi);
1857 	intel_read_infoframe(encoder, pipe_config,
1859 			     &pipe_config->infoframes.spd);
1860 	intel_read_infoframe(encoder, pipe_config,
1862 			     &pipe_config->infoframes.hdmi);
1866 				    const struct intel_crtc_state *pipe_config,
1869 	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
1871 	WARN_ON(!pipe_config->has_hdmi_sink);
1874 	intel_audio_codec_enable(encoder, pipe_config, conn_state);
1878 			    const struct intel_crtc_state *pipe_config,
1889 	if (pipe_config->has_audio)
1895 	if (pipe_config->has_audio)
1896 		intel_enable_hdmi_audio(encoder, pipe_config, conn_state);
1900 			    const struct intel_crtc_state *pipe_config,
1911 	if (pipe_config->has_audio)
1930 	if (pipe_config->pipe_bpp > 24 &&
1931 	    pipe_config->pixel_multiplier > 1) {
1945 	if (pipe_config->has_audio)
1946 		intel_enable_hdmi_audio(encoder, pipe_config, conn_state);
1950 			    const struct intel_crtc_state *pipe_config,
1955 	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
1963 	if (pipe_config->has_audio)
1976 	if (pipe_config->pipe_bpp > 24) {
1988 	if (pipe_config->pipe_bpp > 24) {
2000 	if (pipe_config->has_audio)
2001 		intel_enable_hdmi_audio(encoder, pipe_config, conn_state);
2005 			    const struct intel_crtc_state *pipe_config,
2411 			      struct intel_crtc_state *pipe_config,
2416 	struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
2427 	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
2428 	pipe_config->has_hdmi_sink = !force_dvi && intel_hdmi->has_hdmi_sink;
2430 	if (pipe_config->has_hdmi_sink)
2431 		pipe_config->has_infoframe = true;
2434 		pipe_config->pixel_multiplier = 2;
2437 		if (!intel_hdmi_ycbcr420_config(connector, pipe_config)) {
2443 	pipe_config->limited_color_range =
2444 		intel_hdmi_limited_color_range(pipe_config, conn_state);
2447 		pipe_config->has_pch_encoder = true;
2449 	if (pipe_config->has_hdmi_sink) {
2451 			pipe_config->has_audio = intel_hdmi->has_audio;
2453 			pipe_config->has_audio =
2457 	ret = intel_hdmi_compute_clock(encoder, pipe_config, force_dvi);
2465 	pipe_config->lane_count = 4;
2470 			pipe_config->hdmi_scrambling = true;
2472 		if (pipe_config->port_clock > 340000) {
2473 			pipe_config->hdmi_scrambling = true;
2474 			pipe_config->hdmi_high_tmds_clock_ratio = true;
2478 	intel_hdmi_compute_gcp_infoframe(encoder, pipe_config, conn_state);
2480 	if (!intel_hdmi_compute_avi_infoframe(encoder, pipe_config, conn_state)) {
2485 	if (!intel_hdmi_compute_spd_infoframe(encoder, pipe_config, conn_state)) {
2490 	if (!intel_hdmi_compute_hdmi_infoframe(encoder, pipe_config, conn_state)) {
2495 	if (!intel_hdmi_compute_drm_infoframe(encoder, pipe_config, conn_state)) {
2669 				  const struct intel_crtc_state *pipe_config,
2675 	intel_hdmi_prepare(encoder, pipe_config);
2678 				       pipe_config->has_infoframe,
2679 				       pipe_config, conn_state);
2683 				const struct intel_crtc_state *pipe_config,
2689 	vlv_phy_pre_encoder_enable(encoder, pipe_config);
2696 			      pipe_config->has_infoframe,
2697 			      pipe_config, conn_state);
2699 	g4x_enable_hdmi(encoder, pipe_config, conn_state);
2705 				    const struct intel_crtc_state *pipe_config,
2708 	intel_hdmi_prepare(encoder, pipe_config);
2710 	vlv_phy_pre_pll_enable(encoder, pipe_config);
2714 				    const struct intel_crtc_state *pipe_config,
2717 	intel_hdmi_prepare(encoder, pipe_config);
2719 	chv_phy_pre_pll_enable(encoder, pipe_config);
2753 				const struct intel_crtc_state *pipe_config,
2760 	chv_phy_pre_encoder_enable(encoder, pipe_config);
2767 			      pipe_config->has_infoframe,
2768 			      pipe_config, conn_state);
2770 	g4x_enable_hdmi(encoder, pipe_config, conn_state);