Lines Matching defs:clk_div
1759 struct bxt_clk_div *clk_div)
1776 clk_div->p1 = best_clock.p1;
1777 clk_div->p2 = best_clock.p2;
1779 clk_div->n = best_clock.n;
1780 clk_div->m2_int = best_clock.m2 >> 22;
1781 clk_div->m2_frac = best_clock.m2 & ((1 << 22) - 1);
1782 clk_div->m2_frac_en = clk_div->m2_frac != 0;
1784 clk_div->vco = best_clock.vco;
1790 struct bxt_clk_div *clk_div)
1795 *clk_div = bxt_dp_clk_val[0];
1798 *clk_div = bxt_dp_clk_val[i];
1803 clk_div->vco = clock * 10 / 2 * clk_div->p1 * clk_div->p2;
1807 const struct bxt_clk_div *clk_div)
1811 int vco = clk_div->vco;
1849 dpll_hw_state->ebb0 = PORT_PLL_P1(clk_div->p1) | PORT_PLL_P2(clk_div->p2);
1850 dpll_hw_state->pll0 = clk_div->m2_int;
1851 dpll_hw_state->pll1 = PORT_PLL_N(clk_div->n);
1852 dpll_hw_state->pll2 = clk_div->m2_frac;
1854 if (clk_div->m2_frac_en)
1878 struct bxt_clk_div clk_div = {};
1880 bxt_ddi_dp_pll_dividers(crtc_state, &clk_div);
1882 return bxt_ddi_set_dpll_hw_state(crtc_state, &clk_div);
1888 struct bxt_clk_div clk_div = {};
1890 bxt_ddi_hdmi_pll_dividers(crtc_state, &clk_div);
1892 return bxt_ddi_set_dpll_hw_state(crtc_state, &clk_div);