i915/display/intel_display_power.c

167 				    struct i915_power_well *power_well)
169 	DRM_DEBUG_KMS("enabling %s\n", power_well->desc->name);
170 	power_well->desc->ops->enable(dev_priv, power_well);
171 	power_well->hw_enabled = true;
175 				     struct i915_power_well *power_well)
177 	DRM_DEBUG_KMS("disabling %s\n", power_well->desc->name);
178 	power_well->hw_enabled = false;
179 	power_well->desc->ops->disable(dev_priv, power_well);
183 				 struct i915_power_well *power_well)
185 	if (!power_well->count++)
186 		intel_power_well_enable(dev_priv, power_well);
190 				 struct i915_power_well *power_well)
192 	WARN(!power_well->count, "Use count on power well %s is already zero",
193 	     power_well->desc->name);
195 	if (!--power_well->count)
196 		intel_power_well_disable(dev_priv, power_well);
214 	struct i915_power_well *power_well;
222 	for_each_power_domain_well_reverse(dev_priv, power_well, BIT_ULL(domain)) {
223 		if (power_well->desc->always_on)
226 		if (!power_well->hw_enabled) {
293 					   struct i915_power_well *power_well)
295 	const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
296 	int pw_idx = power_well->desc->hsw.idx;
302 			      power_well->desc->name);
305 		WARN_ON(!power_well->desc->hsw.is_tc_tbt);
326 					    struct i915_power_well *power_well)
328 	const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
329 	int pw_idx = power_well->desc->hsw.idx;
349 		      power_well->desc->name,
362 				  struct i915_power_well *power_well)
364 	const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
365 	int pw_idx = power_well->desc->hsw.idx;
366 	bool wait_fuses = power_well->desc->hsw.has_fuses;
386 	hsw_wait_for_power_well_enable(dev_priv, power_well);
401 				   power_well->desc->hsw.irq_pipe_mask,
402 				   power_well->desc->hsw.has_vga);
406 				   struct i915_power_well *power_well)
408 	const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
409 	int pw_idx = power_well->desc->hsw.idx;
413 				   power_well->desc->hsw.irq_pipe_mask);
417 	hsw_wait_for_power_well_disable(dev_priv, power_well);
424 				    struct i915_power_well *power_well)
426 	const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
427 	int pw_idx = power_well->desc->hsw.idx;
441 	hsw_wait_for_power_well_enable(dev_priv, power_well);
454 				     struct i915_power_well *power_well)
456 	const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
457 	int pw_idx = power_well->desc->hsw.idx;
469 	hsw_wait_for_power_well_disable(dev_priv, power_well);
479 				     struct i915_power_well *power_well)
481 	int pw_idx = power_well->desc->hsw.idx;
483 	return power_well->desc->hsw.is_tc_tbt ? ICL_TBT_AUX_PW_TO_CH(pw_idx) :
492 				      struct i915_power_well *power_well)
494 	int refs = hweight64(power_well->desc->domains &
497 	WARN_ON(refs > power_well->count);
503 					struct i915_power_well *power_well)
505 	enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well);
510 	if (power_well_async_ref_count(dev_priv, power_well) ==
511 	    power_well->count)
514 	aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well);
547 					struct i915_power_well *power_well)
557 				 struct i915_power_well *power_well)
559 	enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well);
562 	icl_tc_port_assert_ref_held(dev_priv, power_well);
566 	if (power_well->desc->hsw.is_tc_tbt)
570 	hsw_power_well_enable(dev_priv, power_well);
572 	if (INTEL_GEN(dev_priv) >= 12 && !power_well->desc->hsw.is_tc_tbt) {
575 		tc_port = TGL_AUX_PW_TO_TC_PORT(power_well->desc->hsw.idx);
586 				  struct i915_power_well *power_well)
588 	icl_tc_port_assert_ref_held(dev_priv, power_well);
590 	hsw_power_well_disable(dev_priv, power_well);
599 				   struct i915_power_well *power_well)
601 	const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
602 	enum i915_power_well_id id = power_well->desc->id;
603 	int pw_idx = power_well->desc->hsw.idx;
860 	struct i915_power_well *power_well;
862 	for_each_power_well(dev_priv, power_well)
863 		if (power_well->desc->id == power_well_id)
864 			return power_well;
889 	struct i915_power_well *power_well;
894 	power_well = lookup_power_well(dev_priv, SKL_DISP_DC_OFF);
896 	if (WARN_ON(!power_well))
904 	dc_off_enabled = power_well->desc->ops->is_enabled(dev_priv,
905 							   power_well);
911 		power_well->desc->ops->enable(dev_priv, power_well);
916 		power_well->desc->ops->disable(dev_priv, power_well);
975 				   struct i915_power_well *power_well)
977 	const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
978 	int pw_idx = power_well->desc->hsw.idx;
993 					   struct i915_power_well *power_well)
995 	bxt_ddi_phy_init(dev_priv, power_well->desc->bxt.phy);
999 					    struct i915_power_well *power_well)
1001 	bxt_ddi_phy_uninit(dev_priv, power_well->desc->bxt.phy);
1005 					    struct i915_power_well *power_well)
1007 	return bxt_ddi_phy_is_enabled(dev_priv, power_well->desc->bxt.phy);
1012 	struct i915_power_well *power_well;
1014 	power_well = lookup_power_well(dev_priv, BXT_DISP_PW_DPIO_CMN_A);
1015 	if (power_well->count > 0)
1016 		bxt_ddi_phy_verify_state(dev_priv, power_well->desc->bxt.phy);
1018 	power_well = lookup_power_well(dev_priv, VLV_DISP_PW_DPIO_CMN_BC);
1019 	if (power_well->count > 0)
1020 		bxt_ddi_phy_verify_state(dev_priv, power_well->desc->bxt.phy);
1023 		power_well = lookup_power_well(dev_priv,
1025 		if (power_well->count > 0)
1027 						 power_well->desc->bxt.phy);
1032 					   struct i915_power_well *power_well)
1077 					  struct i915_power_well *power_well)
1083 					   struct i915_power_well *power_well)
1102 					 struct i915_power_well *power_well)
1107 					   struct i915_power_well *power_well)
1112 					     struct i915_power_well *power_well)
1118 					 struct i915_power_well *power_well)
1127 					  struct i915_power_well *power_well)
1134 					  struct i915_power_well *power_well)
1141 					  struct i915_power_well *power_well)
1143 	if (power_well->count > 0)
1144 		i830_pipes_power_well_enable(dev_priv, power_well);
1146 		i830_pipes_power_well_disable(dev_priv, power_well);
1150 			       struct i915_power_well *power_well, bool enable)
1152 	int pw_idx = power_well->desc->vlv.idx;
1186 				  struct i915_power_well *power_well)
1188 	vlv_set_power_well(dev_priv, power_well, true);
1192 				   struct i915_power_well *power_well)
1194 	vlv_set_power_well(dev_priv, power_well, false);
1198 				   struct i915_power_well *power_well)
1200 	int pw_idx = power_well->desc->vlv.idx;
1330 					  struct i915_power_well *power_well)
1332 	vlv_set_power_well(dev_priv, power_well, true);
1338 					   struct i915_power_well *power_well)
1342 	vlv_set_power_well(dev_priv, power_well, false);
1346 					   struct i915_power_well *power_well)
1351 	vlv_set_power_well(dev_priv, power_well, true);
1368 					    struct i915_power_well *power_well)
1378 	vlv_set_power_well(dev_priv, power_well, false);
1491 					   struct i915_power_well *power_well)
1497 	WARN_ON_ONCE(power_well->desc->id != VLV_DISP_PW_DPIO_CMN_BC &&
1498 		     power_well->desc->id != CHV_DISP_PW_DPIO_CMN_D);
1500 	if (power_well->desc->id == VLV_DISP_PW_DPIO_CMN_BC) {
1510 	vlv_set_power_well(dev_priv, power_well, true);
1525 	if (power_well->desc->id == VLV_DISP_PW_DPIO_CMN_BC) {
1552 					    struct i915_power_well *power_well)
1556 	WARN_ON_ONCE(power_well->desc->id != VLV_DISP_PW_DPIO_CMN_BC &&
1557 		     power_well->desc->id != CHV_DISP_PW_DPIO_CMN_D);
1559 	if (power_well->desc->id == VLV_DISP_PW_DPIO_CMN_BC) {
1571 	vlv_set_power_well(dev_priv, power_well, false);
1706 					struct i915_power_well *power_well)
1735 				    struct i915_power_well *power_well,
1769 				       struct i915_power_well *power_well)
1771 	chv_set_pipe_power_well(dev_priv, power_well, true);
1777 					struct i915_power_well *power_well)
1781 	chv_set_pipe_power_well(dev_priv, power_well, false);
1908 	struct i915_power_well *power_well;
1913 	for_each_power_domain_well(dev_priv, power_well, BIT_ULL(domain))
1914 		intel_power_well_get(dev_priv, power_well);
1992 	struct i915_power_well *power_well;
2006 	for_each_power_domain_well_reverse(dev_priv, power_well, BIT_ULL(domain))
2007 		intel_power_well_put(dev_priv, power_well);
3006 	struct i915_power_well *power_well;
3009 	power_well = lookup_power_well(dev_priv, power_well_id);
3010 	ret = power_well->desc->ops->is_enabled(dev_priv, power_well);
4371 	struct i915_power_well *power_well;
4374 	for_each_power_well(dev_priv, power_well) {
4375 		power_well->desc->ops->sync_hw(dev_priv, power_well);
4376 		power_well->hw_enabled =
4377 			power_well->desc->ops->is_enabled(dev_priv, power_well);
5429 	struct i915_power_well *power_well;
5431 	for_each_power_well(i915, power_well) {
5435 				 power_well->desc->name, power_well->count);
5437 		for_each_power_domain(domain, power_well->desc->domains)
5457 	struct i915_power_well *power_well;
5465 	for_each_power_well(i915, power_well) {
5470 		enabled = power_well->desc->ops->is_enabled(i915, power_well);
5471 		if ((power_well->count || power_well->desc->always_on) !=
5474 				  power_well->desc->name,
5475 				  power_well->count, enabled);
5478 		for_each_power_domain(domain, power_well->desc->domains)
5481 		if (power_well->count != domains_count) {
5484 				  power_well->desc->name, power_well->count,