Lines Matching refs:tiles
2364 unsigned int tiles;
2370 tiles = (old_offset - new_offset) / tile_size;
2372 *y += tiles / pitch_tiles * tile_height;
2373 *x += tiles % pitch_tiles * tile_width;
2469 unsigned int tile_rows, tiles, pitch_tiles;
2484 tiles = *x / tile_width;
2487 offset = (tile_rows * pitch_tiles + tiles) * tile_size;
2619 * main surface. And each 64B CCS cache line represents an area of 4x1 Y-tiles
3097 /* how many tiles does this plane need */
3118 /* how many tiles in total needed in the bo */
4484 * linear buffers or in number of tiles for tiled buffers.
12462 * All the other CRTCs corresponding to other tiles of the same Tile group
12464 * If all tiles not present do not make master slave assignments.