Lines Matching refs:dispclk_mhz
238 .dispclk_mhz = 513.0,
249 .dispclk_mhz = 642.0,
260 .dispclk_mhz = 734.0,
271 .dispclk_mhz = 1100.0,
282 .dispclk_mhz = 1284.0,
294 .dispclk_mhz = 1284.0,
2674 pipes[pipe_cnt].clks_cfg.dispclk_mhz = context->bw_ctx.dml.vba.RequiredDISPCLK[vlevel][context->bw_ctx.dml.vba.maxMpcComb];
2696 pipes[pipe_cnt].clks_cfg.dispclk_mhz = context->bw_ctx.dml.soc.clock_limits[0].dispclk_mhz;
2699 if (dc->debug.min_disp_clk_khz > pipes[pipe_cnt].clks_cfg.dispclk_mhz * 1000)
2700 pipes[pipe_cnt].clks_cfg.dispclk_mhz = dc->debug.min_disp_clk_khz / 1000.0;
2854 context->bw_ctx.bw.dcn.clk.max_supported_dispclk_khz = context->bw_ctx.dml.soc.clock_limits[vlevel].dispclk_mhz * 1000;
3160 if ((bb->clock_limits[i].dispclk_mhz > (max_clocks.displayClockInKhz / 1000))
3162 bb->clock_limits[i].dispclk_mhz = (max_clocks.displayClockInKhz / 1000);
3187 if (bb->clock_limits[i-1].dispclk_mhz != bb->clock_limits[i].dispclk_mhz)
3248 calculated_states[i].dispclk_mhz = max_clocks->displayClockInKhz / 1000;
3430 dcn2_0_nv12_soc.clock_limits[i].dispclk_mhz =
3431 fixed16_to_double_to_cpu(bb->clock_limits[i].dispclk_mhz);