Lines Matching refs:compressor

324 void dce112_compressor_power_up_fbc(struct compressor *compressor)
330 value = dm_read_reg(compressor->ctx, addr);
334 if (compressor->options.bits.CLK_GATING_DISABLED == 1) {
342 dm_write_reg(compressor->ctx, addr, value);
345 value = dm_read_reg(compressor->ctx, addr);
349 dm_write_reg(compressor->ctx, addr, value);
352 value = dm_read_reg(compressor->ctx, addr);
354 dm_write_reg(compressor->ctx, addr, value);
360 dm_write_reg(compressor->ctx, addr, value);
361 compressor->min_compress_ratio = FBC_COMPRESS_RATIO_1TO1;
364 dm_write_reg(compressor->ctx, mmFBC_IND_LUT0, value);
367 dm_write_reg(compressor->ctx, mmFBC_IND_LUT1, value);
371 struct compressor *compressor,
375 struct dce112_compressor *cp110 = TO_DCE112_COMPRESSOR(compressor);
377 if (compressor->options.bits.FBC_SUPPORT &&
378 (compressor->options.bits.DUMMY_BACKEND == 0) &&
379 (!dce112_compressor_is_fbc_enabled_in_hw(compressor, NULL)) &&
391 if (compressor->options.bits.LPT_SUPPORT && (paths_num < 2) &&
395 dce112_compressor_enable_lpt(compressor);
399 value = dm_read_reg(compressor->ctx, addr);
405 dm_write_reg(compressor->ctx, addr, value);
408 compressor->is_enabled = true;
409 compressor->attached_inst = params->inst;
414 dm_write_reg(compressor->ctx, addr, value);
416 dm_write_reg(compressor->ctx, addr, value);
422 void dce112_compressor_disable_fbc(struct compressor *compressor)
424 struct dce112_compressor *cp110 = TO_DCE112_COMPRESSOR(compressor);
426 if (compressor->options.bits.FBC_SUPPORT &&
427 dce112_compressor_is_fbc_enabled_in_hw(compressor, NULL)) {
430 reg_data = dm_read_reg(compressor->ctx, mmFBC_CNTL);
432 dm_write_reg(compressor->ctx, mmFBC_CNTL, reg_data);
435 compressor->attached_inst = 0;
436 compressor->is_enabled = false;
440 if (compressor->options.bits.LPT_SUPPORT)
441 dce112_compressor_disable_lpt(compressor);
448 struct compressor *compressor,
454 value = dm_read_reg(compressor->ctx, mmFBC_STATUS);
457 *inst = compressor->attached_inst;
461 value = dm_read_reg(compressor->ctx, mmFBC_MISC);
463 value = dm_read_reg(compressor->ctx, mmFBC_CNTL);
468 compressor->attached_inst;
475 bool dce112_compressor_is_lpt_enabled_in_hw(struct compressor *compressor)
478 uint32_t value = dm_read_reg(compressor->ctx,
488 struct compressor *compressor,
491 struct dce112_compressor *cp110 = TO_DCE112_COMPRESSOR(compressor);
495 compressor->compr_surface_address.addr.low_part;
499 compressor->ctx,
502 dm_write_reg(compressor->ctx,
505 if (compressor->options.bits.LPT_SUPPORT) {
517 dm_write_reg(compressor->ctx,
519 compressor->compr_surface_address.addr.high_part);
520 dm_write_reg(compressor->ctx,
528 if (compressor->min_compress_ratio == FBC_COMPRESS_RATIO_1TO1)
536 dm_write_reg(compressor->ctx, DCP_REG(mmGRPH_COMPRESS_PITCH), 0);
544 dm_write_reg(compressor->ctx, DCP_REG(mmGRPH_COMPRESS_PITCH), value);
548 void dce112_compressor_disable_lpt(struct compressor *compressor)
550 struct dce112_compressor *cp110 = TO_DCE112_COMPRESSOR(compressor);
559 compressor->ctx,
567 compressor->ctx,
573 value = dm_read_reg(compressor->ctx, addr);
579 dm_write_reg(compressor->ctx, addr, value);
583 value = dm_read_reg(compressor->ctx, addr);
589 dm_write_reg(compressor->ctx, addr, value);
593 value = dm_read_reg(compressor->ctx, addr);
599 dm_write_reg(compressor->ctx, mmGMCON_LPT_TARGET, value);
602 void dce112_compressor_enable_lpt(struct compressor *compressor)
604 struct dce112_compressor *cp110 = TO_DCE112_COMPRESSOR(compressor);
611 value = dm_read_reg(compressor->ctx,
618 dm_write_reg(compressor->ctx,
623 value = dm_read_reg(compressor->ctx, addr);
629 dm_write_reg(compressor->ctx, addr, value);
635 value_control = dm_read_reg(compressor->ctx, addr);
641 value = dm_read_reg(compressor->ctx, addr);
648 dm_write_reg(compressor->ctx, addr, value);
652 value = dm_read_reg(compressor->ctx, addr);
658 dm_write_reg(compressor->ctx, addr, value);
662 struct compressor *compressor,
665 struct dce112_compressor *cp110 = TO_DCE112_COMPRESSOR(compressor);
672 if (!compressor->options.bits.LPT_SUPPORT)
675 lpt_control = dm_read_reg(compressor->ctx,
683 switch (compressor->lpt_channels_num) {
730 dm_write_reg(compressor->ctx,
739 struct compressor *compressor,
746 uint32_t value = dm_read_reg(compressor->ctx, addr);
753 dm_write_reg(compressor->ctx, addr, value);
758 * Used as the initial value of the metadata sent to the compressor
759 * after invalidation, to indicate that the compressor should attempt
780 value = dm_read_reg(compressor->ctx, addr);
792 dm_write_reg(compressor->ctx, addr, value);
795 void dce112_compressor_construct(struct dce112_compressor *compressor,
801 compressor->base.options.raw = 0;
802 compressor->base.options.bits.FBC_SUPPORT = true;
803 compressor->base.options.bits.LPT_SUPPORT = true;
805 compressor->base.lpt_channels_num = 1;
806 compressor->base.options.bits.DUMMY_BACKEND = false;
810 if (compressor->base.memory_bus_width == 64)
811 compressor->base.options.bits.LPT_SUPPORT = false;
813 compressor->base.options.bits.CLK_GATING_DISABLED = false;
815 compressor->base.ctx = ctx;
816 compressor->base.embedded_panel_h_size = 0;
817 compressor->base.embedded_panel_v_size = 0;
818 compressor->base.memory_bus_width = ctx->asic_id.vram_width;
819 compressor->base.allocated_size = 0;
820 compressor->base.preferred_requested_size = 0;
821 compressor->base.min_compress_ratio = FBC_COMPRESS_RATIO_INVALID;
822 compressor->base.banks_num = 0;
823 compressor->base.raw_size = 0;
824 compressor->base.channel_interleave_size = 0;
825 compressor->base.dram_channels_num = 0;
826 compressor->base.lpt_channels_num = 0;
827 compressor->base.attached_inst = 0;
828 compressor->base.is_enabled = false;
832 compressor->base.embedded_panel_h_size =
834 compressor->base.embedded_panel_v_size =
839 struct compressor *dce112_compressor_create(struct dc_context *ctx)
851 void dce112_compressor_destroy(struct compressor **compressor)
853 kfree(TO_DCE112_COMPRESSOR(*compressor));
854 *compressor = NULL;