dc/dce110/amdgpu_dce110_compressor.c

78 static void reset_lb_on_vblank(struct compressor *compressor, uint32_t crtc_inst)
84 	struct dce110_compressor *cp110 = TO_DCE110_COMPRESSOR(compressor);
88 	status_pos = dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_POSITION));
92 	if (status_pos != dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_POSITION))) {
94 		value = dm_read_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL));
97 		dm_write_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL), value);
99 		frame_count = dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_FRAME_COUNT));
103 			if (frame_count != dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_FRAME_COUNT)))
111 		value = dm_read_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL));
114 		dm_write_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL), value);
147 void dce110_compressor_power_up_fbc(struct compressor *compressor)
153 	value = dm_read_reg(compressor->ctx, addr);
157 	if (compressor->options.bits.CLK_GATING_DISABLED == 1) {
165 	dm_write_reg(compressor->ctx, addr, value);
168 	value = dm_read_reg(compressor->ctx, addr);
172 	dm_write_reg(compressor->ctx, addr, value);
175 	value = dm_read_reg(compressor->ctx, addr);
177 	dm_write_reg(compressor->ctx, addr, value);
183 	dm_write_reg(compressor->ctx, addr, value);
184 	compressor->min_compress_ratio = FBC_COMPRESS_RATIO_1TO1;
187 	dm_write_reg(compressor->ctx, mmFBC_IND_LUT0, value);
190 	dm_write_reg(compressor->ctx, mmFBC_IND_LUT1, value);
194 	struct compressor *compressor,
197 	struct dce110_compressor *cp110 = TO_DCE110_COMPRESSOR(compressor);
199 	if (compressor->options.bits.FBC_SUPPORT &&
200 		(!dce110_compressor_is_fbc_enabled_in_hw(compressor, NULL))) {
206 		value = dm_read_reg(compressor->ctx, addr);
213 		dm_write_reg(compressor->ctx, addr, value);
216 		compressor->is_enabled = true;
220 		compressor->attached_inst = params->inst + CONTROLLER_ID_D0;
224 		dm_write_reg(compressor->ctx, addr, value);
227 		misc_value = dm_read_reg(compressor->ctx, mmFBC_MISC);
236 		dm_write_reg(compressor->ctx, mmFBC_MISC, misc_value);
240 		dm_write_reg(compressor->ctx, addr, value);
246 void dce110_compressor_disable_fbc(struct compressor *compressor)
248 	struct dce110_compressor *cp110 = TO_DCE110_COMPRESSOR(compressor);
251 	if (compressor->options.bits.FBC_SUPPORT) {
252 		if (dce110_compressor_is_fbc_enabled_in_hw(compressor, &crtc_inst)) {
255 			reg_data = dm_read_reg(compressor->ctx, mmFBC_CNTL);
257 			dm_write_reg(compressor->ctx, mmFBC_CNTL, reg_data);
260 			compressor->attached_inst = 0;
261 			compressor->is_enabled = false;
268 			reset_lb_on_vblank(compressor,
274 	struct compressor *compressor,
280 	value = dm_read_reg(compressor->ctx, mmFBC_STATUS);
283 			*inst = compressor->attached_inst;
287 	value = dm_read_reg(compressor->ctx, mmFBC_MISC);
289 		value = dm_read_reg(compressor->ctx, mmFBC_CNTL);
294 					compressor->attached_inst;
303 	struct compressor *compressor,
306 	struct dce110_compressor *cp110 = TO_DCE110_COMPRESSOR(compressor);
310 		compressor->compr_surface_address.addr.low_part;
316 		compressor->ctx,
319 	dm_write_reg(compressor->ctx,
323 	dm_write_reg(compressor->ctx,
325 		compressor->compr_surface_address.addr.high_part);
326 	dm_write_reg(compressor->ctx,
332 	if (compressor->min_compress_ratio == FBC_COMPRESS_RATIO_1TO1)
339 	dm_write_reg(compressor->ctx, DCP_REG(mmGRPH_COMPRESS_PITCH), 0);
347 	dm_write_reg(compressor->ctx, DCP_REG(mmGRPH_COMPRESS_PITCH), value);
352 	struct compressor *compressor,
359 	uint32_t value = dm_read_reg(compressor->ctx, addr);
366 	dm_write_reg(compressor->ctx, addr, value);
371 	 * Used as the initial value of the metadata sent to the compressor
372 	 * after invalidation, to indicate that the compressor should attempt
393 	value = dm_read_reg(compressor->ctx, addr);
399 	dm_write_reg(compressor->ctx, addr, value);
402 struct compressor *dce110_compressor_create(struct dc_context *ctx)
414 void dce110_compressor_destroy(struct compressor **compressor)
416 	kfree(TO_DCE110_COMPRESSOR(*compressor));
417 	*compressor = NULL;
500 void dce110_compressor_construct(struct dce110_compressor *compressor,
504 	compressor->base.options.raw = 0;
505 	compressor->base.options.bits.FBC_SUPPORT = true;
508 	compressor->base.lpt_channels_num = 1;
509 	compressor->base.options.bits.DUMMY_BACKEND = false;
517 	compressor->base.options.bits.CLK_GATING_DISABLED = false;
519 	compressor->base.ctx = ctx;
520 	compressor->base.embedded_panel_h_size = 0;
521 	compressor->base.embedded_panel_v_size = 0;
522 	compressor->base.memory_bus_width = ctx->asic_id.vram_width;
523 	compressor->base.allocated_size = 0;
524 	compressor->base.preferred_requested_size = 0;
525 	compressor->base.min_compress_ratio = FBC_COMPRESS_RATIO_INVALID;
526 	compressor->base.banks_num = 0;
527 	compressor->base.raw_size = 0;
528 	compressor->base.channel_interleave_size = 0;
529 	compressor->base.dram_channels_num = 0;
530 	compressor->base.lpt_channels_num = 0;
531 	compressor->base.attached_inst = CONTROLLER_ID_UNDEFINED;
532 	compressor->base.is_enabled = false;
533 	compressor->base.funcs = &dce110_compressor_funcs;